Title:
PATTERN-MATCHING METHOD AND DEVICE FOR A MULTIPROCESSOR ENVIRONMENT
Document Type and Number:
WIPO Patent Application WO/2011/078108
Kind Code:
A1
Abstract:
Disclosed is a pattern-matching device that operates in a multi-core processor environment that has a multi-core CPU provided with: a plurality of processor cores; and a shared memory shared among the processor cores, which exist within the same CPU. The shared memory contains a pattern table provided with search patterns. The pattern-matching device executes a pattern-matching process in parallel across the plurality of processor cores. Said pattern-matching process tries to match a search target, namely a search key.
Inventors:
YAMAGAKI NORIO (JP)
Application Number:
PCT/JP2010/072869
Publication Date:
June 30, 2011
Filing Date:
December 20, 2010
Export Citation:
Assignee:
NEC CORP (JP)
YAMAGAKI NORIO (JP)
YAMAGAKI NORIO (JP)
International Classes:
G06F17/30; H04L12/56
Domestic Patent References:
| WO2009148021A1 | 2009-12-10 |
Foreign References:
| JP2008204292A | 2008-09-04 | |||
| JP2009037403A | 2009-02-19 | |||
| JP2008210027A | 2008-09-11 |
Other References:
SHINJI SHIOTA: "[Gairon] Microprocessor no Genjo", UNIX MAGAZINE, vol. 22, no. 4, 1 October 2007 (2007-10-01), pages 26 - 27
Attorney, Agent or Firm:
NAGAI Michio et al. (JP)
Michio Nagai (JP)
Michio Nagai (JP)
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