Title:
PERIPHERAL DEVICE, INTEGRATED CIRCUIT FOR PERIPHERAL DEVICE AND METHOD FOR ANALYZING FAILURE OF PERIPHERAL DEVICE
Document Type and Number:
WIPO Patent Application WO/2008/016136
Kind Code:
A1
Abstract:
A peripheral device is provided with a second storage device (13), which is connected
to a computer (200) through an interface cable (3), for storing evaluation programs(22)
for the peripheral device (100) and an integrated circuit (400) of the peripheral
device; a detecting section (10), which detects whether a mode instructing signal
transmitted from the computer (200) indicates test mode or normal mode; and a
start-up means (15), which starts up the evaluation program (22) of the second
storage device (13) when the detecting section (10) detects that the mode instructing
signal indicates test mode. Thus, the peripheral device, the integrated circuit
of the peripheral device, and a method for analyzing failures of the peripheral
device are provided for permitting the failures of the peripheral device and
the integrated circuit of the peripheral device in a status where the integrated
circuit is mounted on the peripheral device.
Inventors:
YAMAMOTO KAZUSHI
Application Number:
PCT/JP2007/065245
Publication Date:
February 07, 2008
Filing Date:
August 03, 2007
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD (JP)
YAMAMOTO KAZUSHI
YAMAMOTO KAZUSHI
International Classes:
G06F11/22
Foreign References:
| JPH01127036U | 1989-08-30 | |||
| JPH09297694A | 1997-11-18 | |||
| JP2002216437A | 2002-08-02 | |||
| JPH02114156A | 1990-04-26 | |||
| JP2002252332A | 2002-09-06 |
Attorney, Agent or Firm:
HAYASE, Kenichi (4F The Sumitomo Building No.2,4-7-28, Kitahama, Chuo-ku, Osaka-shi, Osaka 41, JP)
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