Title:
PHASE ADJUSTMENT CIRCUIT, IMAGE FORMING DEVICE, AND PHASE ADJUSTMENT METHOD
Document Type and Number:
WIPO Patent Application WO/2014/208552
Kind Code:
A1
Abstract:
An objective of the present invention is to set an optimal phase with greater precision. A phase adjustment circuit (30) comprises: a phase shift clock generating unit (31) which generates a clock signal of an arbitrarily set phase; a conversion unit (32) which converts serial data to parallel data and outputs same, according to the clock signal which is generated by the phase shift clock generating unit (31); a determination unit (33) which determines the correctness of the parallel data which is converted by the conversion unit (32); and a phase control unit (40) which changes the phase setting such that the phase shift clock generating unit (31) is made to generate a plurality of clock signals with respectively differing phases, specifies a range of phases wherein the serial data is correctly converted to the parallel data by the conversion unit (32) on the basis of the determination result for each instance of the parallel data which is converted by the conversion unit (32) according to each of the plurality of clock signals, and sets the phase shift clock generating unit (31) to an optimal phase which is a value within the range of phases.
Inventors:
WATANABE YUKI (JP)
Application Number:
PCT/JP2014/066704
Publication Date:
December 31, 2014
Filing Date:
June 24, 2014
Export Citation:
Assignee:
KONICA MINOLTA INC (JP)
International Classes:
H04L7/00; H03M9/00; H04L7/02
Foreign References:
| JP2007184847A | 2007-07-19 | |||
| JPH10233698A | 1998-09-02 |
Attorney, Agent or Firm:
KOYO INTERNATIONAL PATENT FIRM (JP)
Patent business corporation Mitsuaki international patent firm (JP)
Patent business corporation Mitsuaki international patent firm (JP)
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