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Patent Searching and Data


Title:
PHASE SHEDDING
Document Type and Number:
WIPO Patent Application WO/2017/007454
Kind Code:
A1
Abstract:
Example implementations relate to phase shedding. For example, phase shedding can include receiving performance and active status information associated with each of a plurality of phases within a system and systematically shedding a phase from within the plurality of phases based on the received information.

Inventors:
KAPOOR MARK V (US)
MCAFEE MARTIN E (US)
WIENCHOL HERMANN (US)
Application Number:
PCT/US2015/039348
Publication Date:
January 12, 2017
Filing Date:
July 07, 2015
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
HEWLETT PACKARD ENTPR DEV LP (US)
International Classes:
G01R23/12; G01R19/252
Foreign References:
US20080036526A12008-02-14
US20110051479A12011-03-03
US20020135338A12002-09-26
US20120086418A12012-04-12
US7728568B12010-06-01
Attorney, Agent or Firm:
ADEKUNLE, Olaolu O. et al. (US)
Download PDF:
Claims:
What is claimed:

1 . A method for phase shedding, comprising:

receiving performance and active status information associated with each of a plurality of phases within a system; and

systematically shedding a phase from within the plurality of phases based on the received information.

2. The method of claim 1 , wherein each of the plurality of phases is a set of field effect transistors.

3. The method of claim 1 , wherein systematically shedding the phase includes shedding a least efficient phase from within the plurality of phases, wherein the least efficient phase uses more current as compared to each of the other phases within the plurality of phases.

4. The method of claim 1 , wherein systematically shedding the phase includes shedding the phase at a predefined point in time.

5. The method of claim 1 , wherein performance information includes an amount of current used by each of the plurality of phases.

6. The method claim 1 , wherein performance information includes a schedule for shedding each of the plurality of phases within the system.

7. The method of claim 1 , wherein active status information includes an indication of whether a phase is turned on or turned off.

8. A non-transitory machine-readable medium storing instructions executable by a processing resource to: collect current use information associated with each of a plurality of phases within a system;

compare current usage between the plurality of phases; and

shed a particular phase from within the plurality of phases based on the comparison.

9. The medium of claim 8, wherein the particular phase is a phase from within the plurality of phases with the highest current usage within the system.

10. The medium of claim 8, wherein the instructions executable to shed the particular phase include instructions executable to turn off the particular phase.

1 1. A system, comprising:

a phase engine to identify a plurality of phases within a system; and a shedding engine to systematically and iteratively shed a phase within the plurality of phases at a particular point in time.

12. The system of claim 1 1 , wherein the particular point in time occurs after a particular time period.

13. The system of claim 1 1 , wherein the particular point in time is power-up of the system.

14. The system of claim 1 1 , wherein the particular point in time is a point in time within a predefined sequential order.

15. The system of claim 1 1 , wherein the particular point in time is system boot.

Description:
PHASE SHEDDING

Background

[0001] Voltage regulators automatically maintain a constant voltage level. Voltage regulators may be used in devices such as computer power supplies where they stabilize direct current (DC) voltages used by a processor and/or other elements. Voltage regulators may use electromechanical mechanisms or electronic components, among others. Voltage regulators may be used to regulate DC and/or alternating current (AC).

Brief Description of the Drawings

[0002] Figure 1 illustrates a diagram of an example system for phase shedding consistent with the present disclosure.

[0003] Figure 2 illustrates a diagram of an example computing device for phase shedding consistent with the present disclosure

[0004] Figure 3 illustrates a diagram of an example method consistent with the present disclosure

Detailed Description

[0005] Phase shedding in accordance with the present disclosure can include the turning on and off of phases within a system and may be used to improve efficiency and reliability of the system. The system may include multiple voltage regulators (also known as voltage regulator downs (VRDs)). The system may include a power converter or an interleaved power converter. The system may also include a device that utilizes a power converter or an interleaved power converter, among others.

[0006] As used herein, a phase is a set of field effect transistors (FETs). Each VRD includes a plurality of phases. For instance, if a particular VRD requires 120 amps of current, this may be supplied by four phases (e.g., sets of FETs). Each phase may supply 30 amps, resulting in 120 amps total. In such an example, if an end device requires 40 amps, two of the four phases may be turned on, or alternatively, two of the four phases may be turned off, or "shed."

[0007] With respect to efficiency, in other approaches, a server may be designed to perform above 90 percent efficiency at 30-60 percent load. If a customer's server workload falls below this threshold, they may experience decreased efficiency in their power supplies and end up paying a more expensive dollar per watt metric. For example, hundreds, thousands, or tens of thousands of servers utilized in a retail environment may experience this decreased efficiency for most of their lifetime due to the fact that they are normally sized to handle the higher holiday season surge at the end of the year, while the bulk of the year their servers are underutilized. Other approaches with respect to efficiency may include systems designed with a smaller boost or standby supply. A separate power supply may be utilized at low loads, but this adds cost, space, and validation time to the design. In such an example, phase shedding may turn off unused phases during low utilization periods improving efficiency, but the phases that are shed are random or pre-chosen without a feedback loop.

[0008] In contrast, examples of the present disclosure may improve power efficiency with a lower incremental cost impact at lower utilization levels. The efficiency of phase shedding may be improved without an additional cost burden by monitoring the least efficient phase and shedding that phase rather than other phases.

[0009] Phase shedding in accordance with the present disclosure may also help to improve efficiency of interleaved power converters by determining the number of active phases based on load current. As used herein, an active phase is a phase that is turned on and is using current. Not all VRD phases, power components, power stages, and layouts are equal. For instance, differences due to numbers of vias, layout, current paths, and components can affect the efficiency of particular phases compared to other phases. Over time, VRD components can wear out due to changing of the characteristics. Certain phases may have better efficiency as compared to others due to a length of routing to the processor, the number and locations of vias, having more available copper, having more space available, and/or having a more efficient VRD layout.

[0010] To account for this, phase shedding in accordance with the present disclosure can include monitoring current utilized by each phase individually under a constant load set. A phase that requires the highest current can be turned off, or "shed" first. This may allow for the most efficient power solution to be utilized. In some examples, current sensing may be incorporated into a multi-phase VRD, such that phase shedding is a cost effective way to improve efficiency. Such an approach may be less expensive than other backup power solutions (e.g., reduced server and power costs).

[0011] With respect to reliability, in other approaches, redundancy may be used, such that if one area of the system fails there is a backup. Another approach includes reducing parts and/or components since that may reduce the possibility of failures. Other approaches may also include utilizing less risky components or more qualified components, but these approaches may be more expensive to implement (e.g., increases component costs).

[0012] In contrast, with respect to reliability, phase shedding in accordance with the present disclosure can include utilizing existing system interfaces and/or components, which may be more cost effective as compared to other approaches. Additionally, phase shedding in accordance with the present disclosure may improve the quality of phase shedding in a multi-phase power converter by employing a round robin methodology to active phases versus inactive phases for phase shedding. This may allow for each of the phases to be used more evenly, as opposed to the use of a master phase utilized more often than other phases (e.g., as used in other approaches).

Phase shedding in accordance with the present disclosure may improve the quality and reliability for multiphase power solutions (e.g., servers, workstations, laptops, etc.) utilizing existing interfaces and without increasing component costs.

[0013] As noted, phase shedding in accordance with the present disclosure can include employing a round robin methodology to power converter phase shedding in order to improve system board quality. Power converters may be hot (e.g., sometimes requiring a heatsink), they switch on and off, and when they fail it may be catastrophic. As noted, other approaches use a "master" power phase that is always the first phase to be turned on or "active". In such an instance, one device is used more frequently than another device, making it more susceptible to wear. By implementing a round robin type of wear leveling methodology to (multiphase) power converters in accordance with the present disclosure, phases may wear evenly. This is opposed to a single phase being over-utilized.

[0014] For example, a power solution may be only as effective as its weakest phase. If one phase is always active while the others are only active part of the time, an unnecessary weak link may be created due to the wear on the always-active phase. This can be avoided by a wear leveling methodology to phase shedding, including a round-robin approach to phase shedding.

Downtime may also be reduced by spreading power usage instead of burdening a few single, individual components.

[0015] In some examples, for multi-phase VRDs, FETs may be integrated into VRD packages rather than existing individually. Integrated FETs may allow for a smaller footprint and cost and for a higher efficiency. However, tolerances may be difficult to control when integrated into a die package with an

application-specific integrated circuit (ASIC), for example. This can result in high side FET shorts within multiphase VRDs. By implementing a round-robin methodology in accordance with the present disclosure, a particular VRD may not be over-utilized, thus improving quality. Reduced server costs may result due to lower warranty costs associated with improved reliability, as well as reduced power costs.

[0016] Figures 1 and 2 illustrate examples of system 100 and computing device 214 consistent with the present disclosure. Figure 1 illustrates a diagram of an example of a system 100 for phase shedding consistent with the present disclosure. The system 100 can include a database 104, a phase shedding system 102, and/or a number of engines (e.g., phase engine 106, shedding engine 1 12). The system 102 can be in communication with the database 104 via a communication link, and can include the number of engines. The system 102 can include additional or fewer engines that are illustrated to perform the various functions as will be described in further detail in connection with Figure 3.

[0017] The number of engines can include a combination of hardware and programming, but at least hardware, that is configured to perform functions described herein (e.g., phase shedding). The programming can include program instructions (e.g., software, firmware, etc.) stored in a memory resource (e.g., computer readable medium, machine readable medium, etc.) as well as hard-wired program (e.g., logic).

[0018] The phase engine 106 can include hardware and/or a combination of hardware and programming, but at least hardware, to identify a plurality of phases within a system. For instance, each of the plurality of phases may be a set of FETs, and identifying each of the plurality of phases may include determining whether each phase is turned on (e.g., using current) or turned off (e.g., not using current).

[0019] The shedding engine 1 12 can include hardware and/or a combination of hardware and programming, but at least hardware, to systematically and iteratively shed each of the plurality of phases at a particular point in time. For instance, each of the phases may be shed evenly, meaning they wear evenly. In an example, the particular point in time may occur after a particular time period, and/or the particular point in time may be a point in time within a predefined sequential order. For instance, a first phase may be turned on at point A and left on for X seconds. After X seconds, the first phase may be shed, and a second phase may be turned on for X seconds. This process may be iterative, such that each phase is turned on for X seconds and then shed. "X seconds", as used herein is just an example. Any desired time period may be used. The time period may be predefined, as may be the order of which the phases are turned on and off.

[0020] In some examples, the particular point in time may be power-up of the system or a portion of the system, while in other examples the particular point in time may be system boot. This can be systematic, such that the phases are set to be shed in a particular order, so they are shed evenly (e.g., at power- up or system boot), resulting in more even wear. As used herein, power-up may include start-up of a device, and system boot may include the initialization of the system and may be a hard boot or a soft boot.

[0021] Figure 2 illustrates a diagram of an example computing device 214 consistent with the present disclosure. The computing device 214 can utilize software, hardware, firmware, and/or logic to perform functions described herein.

[0022] The computing device 214 can be any combination of hardware and program instructions configured to share information. The hardware, for example, can include a processing resource 216 and/or a memory resource 220 (e.g., computer-readable medium (CRM), machine readable medium (MRM), database, etc.). A processing resource 216, as used herein, can include any number of processors capable of executing instructions stored by a memory resource 220. Processing resource 216 may be implemented in a single device or distributed across multiple devices. The program instructions (e.g., computer readable instructions (CRI)) can include instructions stored on the memory resource 220 and executable by the processing resource 216 to implement a desired function (e.g., phase shedding).

[0023] The memory resource 220 can be in communication with a processing resource 216. A memory resource 220, as used herein, can include any number of memory components capable of storing instructions that can be executed by processing resource 216. Such memory resource 220 can be a non-transitory CRM or MRM. Memory resource 220 may be integrated in a single device or distributed across multiple devices. Further, memory resource 220 may be fully or partially integrated in the same device as processing resource 216 or it may be separate but accessible to that device and processing resource 216. Thus, it is noted that the computing device 214 may be implemented on a participant device, on a server device, on a collection of server devices, and/or a combination of the participant device and the server device.

[0024] The memory resource 220 can be in communication with the processing resource 216 via a communication link (e.g., a path) 218. The communication link 218 can be local or remote to a machine (e.g., a computing device) associated with the processing resource 216. Examples of a local communication link 218 can include an electronic bus internal to a machine (e.g., a computing device) where the memory resource 220 is one of volatile, non-volatile, fixed, and/or removable storage medium in communication with the processing resource 216 via the electronic bus.

[0025] A number of modules (e.g., phase module 222, shedding module 224) can include CRI that when executed by the processing resource 216 can perform functions. The number of modules can be sub-modules of other modules. For example, the phase module 222 and the shedding module 224 can be sub-modules and/or contained within the same computing device. In another example, the number of modules can comprise individual modules at separate and distinct locations (e.g., CRM, etc.).

[0026] Each of the number of modules can include instructions that when executed by the processing resource 216 can function as a corresponding engine as described herein. For example, the phase module 222 can include instructions that when executed by the processing resource 216 can function as the phase engine 106. In another example, the shedding module 224 can include instructions that when executed by the processing resource 216 can function as the shedding engine 1 12.

[0027] In some examples, the phase module 222 may include instructions executable by the processing resource 216 to collect current use information associated with each of a plurality of phases within a system. The phase module 222 can also include instructions executable to compare the current usage between the plurality of phases. For instance, this comparison results in a determination of which of the plurality of phases uses the most current. Put another way, the comparison reveals which of the plurality of phases is the least efficient.

[0028] Shedding module 224 may include instructions executable by the processing resource 216 to shed a particular phase from within the plurality of phases based on the comparison. For instance, the particular phase may be a phase from within the plurality of phases with the highest current usage within the system. Said differently, the particular phase that is shed is the least efficient phase. Shedding the particular phase includes turning off the particular phase, resulting in no current running on that phase.

[0029] Figure 3 illustrates a diagram of an example method 330 consistent with the present disclosure. At 332, method 330 includes receiving performance and active status information associated with each of a plurality of phases within a system. As used herein, active status information may include an indication of whether a phase is turned on or turned off. For instance, an active phase is turned on and using current, while an inactive phase is turned off and is not using current.

[0030] Performance information may include an amount of current used by each of the plurality of phases. The performance information of each phase may be compared to each of the other phases. A determination may be made as to which of the phases is using the most current based on this comparison.

[0031] In another example, performance information may include a schedule for shedding each of the plurality of phases within the system. For instance, a schedule may include an order and frequency with which phases in the system may be shed. This even-wear scheduling methodology may allow for systematic shedding of the phases, resulting is decreased degradation of the plurality of phases.

[0032] At 334, method 330 includes systematically shedding a phase from within the plurality of phases based on the received information.

Systematically shedding the phase may include shedding a least efficient phase from within the plurality of phases. For instance, the least efficient phase is the phase that uses more current in comparison to each of the other phases within the plurality of phases. By first shedding the least efficient phase or phases, the system as a whole may run more efficiently

[0033] In another example, systematically shedding the phase includes shedding the phase at a predefined point in time. For instance, the phase may be shed according to the aforementioned schedule. In such an example, in a 5- phase example, phase 1 may be turned on first at a first system boot, while phase 2 may be turned on first at a second system boot, with the process repeating through phase 5 and a fifth system boot. Such a methodology may be iterative such that phase 1 may be turned on at a sixth system boot.

[0034] In the foregoing detailed description of the present disclosure, reference is made to the accompanying drawings that form a part hereof, and in which is shown by way of illustration how examples of the disclosure may be practiced. These examples are described in sufficient detail to enable those of ordinary skill in the art to practice the examples of this disclosure, and it is to be understood that other examples may be utilized and that process, electrical, and/or structural changes may be made without departing from the scope of the present disclosure.

[0035] Elements shown in the various figures herein can be added, exchanged, and/or eliminated so as to provide a number of additional examples of the present disclosure. In addition, the proportion and the relative scale of the elements provided in the figures are intended to illustrate the examples of the present disclosure, and should not be taken in a limiting sense. Further, as used herein, "a number of" an element and/or feature can refer to one or more of such elements and/or features.

[0036] As used herein, "logic" is an alternative or additional processing resource to perform a particular action and/or function, etc., described herein, which includes hardware, e.g., various forms of transistor logic, application specific integrated circuits (ASICs), etc., as opposed to computer executable instructions, e.g., software firmware, etc., stored in memory and executable by a processor.