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Title:
PHASED ARRAY UNIT FOR 5G
Document Type and Number:
WIPO Patent Application WO/2019/190417
Kind Code:
A1
Abstract:
The invention relates to a packaging architecture to be used in 5G systems for multi-channel phased array units and characterized by comprising; A LTCC-based subsystem (1) consisting of chips (6) and an organic-based subsystem (2) consisting of antenna elements; BGA interfaces (3) enabling connections between the LTCC-based subsystem (1) and the organic-based subsystem (2), and connections of the said subsystems (1, 2) to a mainboard (5); Cavities (8) that are formed on LTCC on which Doherty power amplifiers (105) and the chips (6) with the functions of a digital phase shifter (101) and a digital attenuator (102) are positioned; Ceramic walls (7) that separate the said cavities (8) from each other and make insulation between the channels.

Inventors:
AKTUĞ, Ahmet (Mehmet Akif Ersoy Mahallesi 296. Cadde No:16, Yenimahalle/Ankara, TR)
DEĞİRMENCİ, Ahmet (Mehmet Akif Ersoy Mahallesi 296. Cadde No:16, Yenimahalle/Ankara, TR)
KOÇ, Emrah (Mehmet Akif Ersoy Mahallesi 296. Cadde No:16, Yenimahalle/Ankara, TR)
EKER, Taylan (Mehmet Akif Ersoy Mahallesi 296. Cadde No:16, Yenimahalle/Ankara, TR)
SAYGINER, Şebnem (Mehmet Akif Ersoy Mahallesi 296. Cadde No:16, Yenimahalle/Ankara, TR)
SAYGINER, Erdal (Mehmet Akif Ersoy Mahallesi 296. Cadde No:16, Yenimahalle/Ankara, TR)
MAYOCK, Jim (Unit 22 Parsons Court, Welbury WayAycliffe Industrial Estate, Newton Aycliffe, DL5 6ZE, Newton Aycliffe, GB)
Application Number:
TR2018/050129
Publication Date:
October 03, 2019
Filing Date:
March 30, 2018
Export Citation:
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Assignee:
ASELSAN ELEKTRONİK SANAYİ VE TİCARET ANONİM ŞİRKETİ (Mehmet Akif Ersoy Mahallesi 296. Cadde No:16, Yenimahalle/Ankara, 06370, TR)
International Classes:
H04B1/16; H01P1/18; H01Q1/38; H01Q3/26; H01Q21/00; H05K1/16; H05K7/06
Domestic Patent References:
WO2002096166A12002-11-28
Foreign References:
US20100190464A12010-07-29
Attorney, Agent or Firm:
DESTEK PATENT, INC. (Lefkoşe Cad. NM Ofis Park B Blok No:36/5 Beşevler, Bursa, 16110, TR)
Download PDF:
Claims:
CLAIMS

1. A packaging architecture to be used in 5G systems for multi-channel phased array units and characterized by comprising;

• A LTCC-based subsystem (1 ) consisting of chips (6) and an organic-based subsystem (2) consisting of antenna elements,

• BGA interfaces (3) enabling connections between the LTCC-based subsystem (1 ) and the organic-based subsystem (2), and connections of the said subsystems (1 , 2) to a mainboard (5),

• Cavities (8) that are formed on LTCC on which Doherty power amplifiers (105) and the chips (6) with the functions of a digital phase shifter (101 ) and a digital attenuator (102) are positioned,

• Ceramic walls (7) that separate the said cavities (8) from each other and make insulation between the channels.

2. The packaging architecture for the multi-channel phased array units according to claim 1 , characterized by comprising wire (9) that provides the connection of the chips (6).

3. The packaging architecture for the multi-channel phased array units according to claim 1 , characterized by comprising the chips (6) which are connected by means of the method of flip chip (10).

4. The packaging architecture for the multi-channel phased array units according to claim 1 , characterized by comprising the Doherty power amplifiers (105) consist of conductive routes (16) positioned within the ceramic base for heat rejection.

5. The packaging architecture for the multi-channel phased array units according to claim 1 , characterized by comprising the cavity (8) covered with a cap to protect the chips (6) or the chips (6) that are covered with mold.

6. The packaging architecture for the multi-channel phased array units according to claim 1 , characterized by comprising organic-base materials with low dielectric constant, low loss tangent and high production sensitivity in order to ensure high radiation efficiency of the antenna (120).

7. The packaging architecture for the multi-channel phased array units according to claim 1 , characterized by comprising patch elements (200) providing radiation on the upper face of antenna subsystem (2) and an electrical interface (25) providing transmission with LTCC- based subsystem (1 ) positioned on the lower face.

8. The packaging architecture for the multi-channel phased array units according to claim 1 , characterized by comprising the following elements to form single-channel transmit phased array unit element topology;

• N-Bit Digital Phase Shifter (101 ) and M-Bit Digital Phase Shifter (102) that can be digitally controlled in phased array unit element,

• (N+M)-Bit Serial Parallel Converter (103) that provides controlling the Digital Phase Shifter (101 ) and the Digital Attenuator (102) in series and minimizing the connection complexity that may be caused by the increase in bit number,

• Doherty power amplifier (105) that may provide high efficiency in back-off working condition,

• a driver power amplifier (104) and the antenna (120).

9. The packaging architecture for the multi-channel phased array units according to claim 1 , characterized by comprising the following elements to form single-channel transmit phased array unit element topology;

• N-Bit Digital Phase Shifter (101 ) and M-Bit Digital Attenuator (102),

• (N+M+2)-Bit Serial Parallel Converter (103) that provides controlling the Digital Phase Shifter (101 ) and the Digital Attenuator (102) and SPDT switches (109) in series,

• Doherty power amplifier (105) that may provide high efficiency in back-off working condition,

• driver power amplifier (104),

• A low noise amplifier (108)

• 2 pieces of SPDT switches (109) that enable to operate Doherty Power Amplifier (105) switch during the transmission by switching and the low noise amplifier (108) switch during the receiving process,

• A delimiter (1 10) and the antenna (120).

10. The packaging architecture for the multi-channel phased array units according to claim 1 , 8 or 9, characterized by comprising a circulator (106) which can be used in case that return losses of the antenna (120) are very high.

1 1. The packaging architecture for the multi-channel phased array units according to claim 1 , characterized by comprising 2x2 scalable phased array unit which;

• can be formed by means of phased array unit single-channel transmit topology,

• is controlled in the form of series-parallel-series-parallel structure,

• has the serial parallel converter (103), each of them is directly connected to digital controls transmitted to package,

· is distributed to 4 unit cells by RF dividers located on the signal package transmitted from RF input with equiphase and identical amplitude.

12. The packaging architecture for the multi-channel phased array units according to claim 1 , characterized by comprising 2x2 scalable phased array unit which;

• can be formed by means of phased array unit single-channel transmit topology,

• is controlled in the form of series-series-series-parallel structure,

• has the serial parallel converter (103), each of them is not directly connected to digital controls transmitted to package,

• is distributed to 4 unit cells by RF dividers located on the signal package transmitted from RF input with equiphase and identical amplitude.

Description:
Phased Array Unit for 5G

Technical Field

The invention relates to the system structures in a multi-layered, scalable and low-cost package comprising the multi-functional power amplifier and multi-functional digital phase shifter/attenuator MMICs and antennas which can be utilized in RF pre-folded modules of 5G communication systems (massive MIMO).

State of the Art

High-performance communication technologies will be utilized in “Smart Cities” in the upcoming years so as to enhance life quality in urban areas. The dramatic improvements in existing services with low cost and resource utilization will enable to have more active connection among the users. A number of applications will be developed for the concept of smart cities including the management of traffic, water, health-care and energy services. 5G communications systems to be used in these applications will provide critical backbone and infrastructure for data exchange. High data rates of 5G technology will create new opportunities and applications in a couple of years for the smart cities which will enhance quality of life and offer new methods to manage valuable assets in a developed manner.

It is envisaged that 5G technology will use MIMI technology having the capability of operating with phased array antennas (massive MIMO) consisting of a great number of antenna elements in order to form a beam. Massive MIMO, as the candidate to 5G technology, offers substantial gains in wireless data rates and reliability of connection due to the fact that it utilizes a great number of antenna elements (more than 64) in base transceiver stations. Thanks to its structure focusing the energy to targeted mobile user with pre-coding techniques, Massive MIMO reduces the power radiated by means of hundreds of antenna elements. Routing of wireless energy to targeted users enables both the reduction of radiated power and interference to other users. It is a highly important feature for today’s interference-limited cellular networks. If and when the features to be offered by MIMO technology are applicable, the speed of 5G networks in the future will be much higher and they will render services to more users with a connection having higher reliability and energy efficiency. The patent application number US2013189935 (A1 ) which is encountered during technical researches, mentioned about an integrated circuit package configuration, comprising: an antenna system having extending antenna elements; a substrate having a first side, a second side and a network of internal transmission lines continuous from the first side to the second side, wherein the antenna system is attached to the first side and the second side defines at least one cavity; at least one monolithic microwave integrated circuit (MMIC) mounted in the at least one cavity defined by the second side, wherein the extending antenna elements extend via the network of transmission lines of the substrate and contact the MMIC establishing a transceiver circuit.”

As can be seen in the said document, it does not involve a phased array unit in scalable package consisting of digital phase shifter, digital attenuator or Doherty power amplifier specific to 5G applications.

In conclusion, the aforementioned disadvantages and the inadequacy of existing solutions necessitate an innovation in the relevant field.

Purpose of the Invention

This invention aims to disclose a structure having different technical specifications that create a technical innovation in the field other than the existing configurations used in the art.

The principal purpose of invention is to disclose system structures in a multi-layered, scalable and low-cost package comprising multi-functional power amplifier and multi-functional digital phase shifter/attenuator MMICs and antennas which can be utilized in RF pre-folded modules of 5G communication systems (massive MIMO).

The purpose of this invention is to develop high-performance RF units customized for 5G applications.

Another purpose of invention is to use organic-based materials having dielectric constant and economic advantage with a view to increasing propagation efficiency in antenna elements while using ceramic base in chip packaging. The invention relates to a packaging architecture to be used in 5G systems for multi-channel phased array units and characterized by comprising;

• A LTCC-based subsystem consisting of chips and an organic-based subsystem consisting of antenna elements,

• BGA interfaces enabling connections between the LTCC-based subsystem and the organic-based subsystem, and connections of the said subsystems to a mainboard,

• Cavities that are formed on LTCC on which Doherty power amplifiers and the chips with the functions of a digital phase shifter and a digital attenuator are positioned,

• Ceramic walls that separate the said cavities from each other and make insulation between the channels.

The structural and characteristic features of the invention can be understood in more clearly with the following figures and the detailed description that refers to the said figures; therefore, the assessment is required to be made by taking these figures and the detailed description into account.

The Figures to facilitate a Better Understanding of the Invention

Figure 1 , Phased array unit single-channel transmit topology - 1 A

Figure 2, Phased array unit single-channel transmit topology - 1 B

Figure 3, Phased array unit single-channel transmit topology - 1 A, chip clustering

Figure 4, Phased array unit single-channel receive/transmit topology - 2A

Figure 5, Phased array unit single-channel receive/transmit topology - 2A, chip clustering

Figure 6, 2x2 scalable phased array, series-parallel-series-parallel control

Figure 7, 2x2 scalable phased array, series-series-series-parallel control

Figure 10 shows LTCC-based subsystem consisting of the chips and organic-based subsystem consisting of antenna elements.

Figure 11 shows the layout of four-channel phased array units on ceramic base.

Figure 12 is the view of AA’ section of Figure 1 1 .

Figure 13 is the view of AA’ section of Figure 1 1 with flip chip method.

It is not necessarily required to scale the drawings, and the details which are not required to comprehend the present invention may be ignored. Also, the elements which are considerably identical or which have considerably identical functions are shown with the same numbers.

Description of Referenced Parts 1 . LTCC-based subsystem

2. Organic-based subsystem

3. BGA interfaces

5. Mainboard

6. Chip

7. Ceramic wall

8. Cavity

9. Wire

10. Flip chip

15. Matching network

16. Conductive routes

25. Electrical interface

200. Patch elements

101 . Digital phase shifter

102. Digital attenuator

103. Serial parallel converter

104. Driver power amplifier

105. Doherty power amplifier

106. Circulator

107. Terminal

108. Low noise amplifier

109. SPDT switch

1 10. Delimiter

120. Antenna

Detailed Description of the Invention

The preferred embodiments of the configuration of the invention described herein are disclosed as non-limiting descriptions of the invention and intended only for better understanding of the subject matter.

Single-channel unit element RF topologies

Single-channel topologies-1 Phased array unit of this topology is comprised of digitally-controllable N-Bit Digital Phase Shifter (101 ), M-Bit Digital Attenuator (102), (N+M)-Bit Serial Parallel Converter (103) that enables the serial control of Digital Phase Shifter (101 ) and Digital Attenuator (102), Doherty Power Amplifier (105) that provides high efficiency in back-off working condition, driver power amplifier (104) and antenna (120). Figure 1 shows the single-channel transmit phased array unit element topology (1 A). Digital Phase Shifter (101 ) and Digital Attenuator (102) enable more than one antenna (120) elements in massive MIMO structure to form a pattern by adjusting the phase and size value of the signal transmitted to antenna (120). Serial Parallel Converter (103) is utilized to minimize complexity which may arise from the increase in bit number. The positions of digital phase shifter (101 ) and digital attenuator (102) may be changed in terms of linearity and additional driver power amplifiers (104) may be utilized in RF strip. If the return losses of antenna (120) are very high, the circulator (106) can be used as indicated in Figure 2. Each one of the MMIC elements used in RF strip can be designed on separate chips (6) or in cluster. Figure 3 shows an exemplary of a chip (6) cluster.

Single-channel topologies-2

Phased array unit of this topology is comprised of digitally-controllable N-Bit Digital Phase Shifter (101 ), M-Bit Digital Attenuator (102), (N+M+2)-Bit Serial Parallel Converter (103) that enables the serial control of Digital Phase Shifter (101 ) and Digital Attenuator (102) and SPDT switches (109), Doherty Power Amplifier (105) that provides high efficiency in back-off working condition, driver power amplifier (104), 2 pieces of SPDT switches (109), delimiter (1 10), low noise amplifier (108) and antenna (120). Figure 4 shows the single-channel receiver/transmit phased array unit element topology. Digital Phase Shifter (101 ) and Digital Attenuator (102) enable more than one antenna (120) elements in massive MIMO structure to form a pattern by adjusting the phase and size value of the signal transmitted to the antenna (120) and received by the antenna (120). SPDT switches (109) operate the Doherty Power Amplifier (105) switch during the transmission by switching and low noise amplifier (108) switch during the receiving process. SPDT switches (109) can be used as reflective or absorptive. Serial Parallel Converter (103) is utilized to minimize complexity which may arise from the increase in bit number. The positions of digital phase shifter (101 ) and digital attenuator (102) may be changed in terms of linearity and additional driver power amplifiers (104) may be utilized in RF strip. Moreover, the circulator (106) before the antenna (120) can be used for the return losses of antenna (120). Each one of the MMIC elements used in RF strip can be designed on separate chips (6) or in cluster. Figure 5 shows an exemplary of a chip (6) cluster. 4-Channel phase arrays

4 pieces of single-channel topologies reviewed under the title of“Single-Channel Unit Element RF Topologies” can be combined to form 2x2 Scalable Phased Array.

4- Channel Topology - 1

2X2 scalable phased array which has been formed by using Phased Array Unit Element Single- Channel Transmit Topology-1 A (Unit Cell 1 -4) is shown in Figure 6. Serial parallel converter (103) of each cell is directly linked to digital controls that are transmitted to package in this structure as Series-Parallel-Series-Parallel Control. The signal transmitted by RF Input is distributed into 4 unit cells by RF dividers with equiphase and identical amplitude.

4- Channel Topology - 2

2X2 scalable phased array which has been formed by using Phased Array Unit Element Single- Channel Transmit Topology-1 A (Unit Cell 1 -4) is shown in Figure 7. Serial Parallel converter (103) of each cell is not directly linked to digital controls that are transmitted to package in this structure as Series-Series-Series-Parallel Control. The signal transmitted by RF Input is distributed into 4 unit cells by RF dividers with equiphase and identical amplitude.

Packaging layout

LTCC (low temperature cofired ceramic) technology provides a system-level packaging platform in microwave and milimeter wave frequencies. An exemplary LTCC circuit is obtained by combining more than one ceramic layer under pressure and then firing at high temperature. Electrical connections are available between the ceramic layers. Milimeter wave package designs based on this technology delivers reliable and high level of performance by means of the usage of gold, silver or copper conducted thick film metals positioned on ceramic base with low dielectric loss. Also, the compliance of thermal expansion coefficient in ceramic base material with semi-conductive material enables to position the chip on LTCC.

This invention proposes a new packaging architecture for multi-channel phased array units to be used in 5G systems. The realization of all elements via LTCC in package structures of the system results in disadvantage in terms of performance and cost. Organic-based materials having low dielectric constant and economic advantage with a view to increasing propagation efficiency in antenna elements can be utilized while chip packaging requires ceramic base due to the above-mentioned causes.

The system disclosed in this invention includes LTCC-based subsystem (1 ) consisting of the chips and organic-based subsystem (2) consisting of antenna elements as shown in Figure 10. The connections between the said sub-systems (1 , 2) are established by BGA interfaces (3). The subsystems (1 , 2) which are integrated as such are connected to mainboard (5) with BGA interfaces (3).

Figure 1 1 shows the layout of four-channel phased array units on ceramic base. Doherty power amplifiers (105) and the chips (6) having the functions of digital phase shifter (101 ) and digital attenuator (102) on each array are positioned on the cavities (8) formed on LTCC. These cavities (8) are separated from each other by means of the ceramic walls (7) functioning as insulators between the channels.

Figure 12 shows AA’ section of the view indicated in Figure 1 1 . Solder or conductive epoxy is used for the installation of chips (6). The positioned chips may be connected with wire (9) as shown in Figure 12 or they can be realized by the method of flip chip (10) as indicated in Figure 13. Due to the fact that wire (9) connection length is particularly critical in milimeter wave frequency, it has been connected close to the base area of chip to ensure that it will have short length. If required, matching network (15) can be used in these areas. Flip chip (10) installation may increase the production efficiency but heat rejection will be limited. Ceramic base is comprised of conductive routes (16) for heat rejection of Doherty power amplifiers (105). The cavity (8) can be closed with a cap to protect chips (6) or the chips (6) can be covered with mold. Multi-layered LTCC technology enables to integrate passive elements such as resistor and capacitor. By doing so, the structures that will provide power divider/combiner function can be positioned between ceramic layers.

The microstrip patch positioned in 5G phased architecture as illustrated in Figure 10 should be selected from the base materials with low dielectric constant, low loss tangent and high production sensitivity in order to enable the antenna (120) to have high radiation efficiency. For this reason, the antenna (120) has been designed with organic-based material. The upper surface of antenna subsystem (2) consists of patch elements (200) that will provide radiation while the lower surface consists of electrical interface (25) that will provide the transmission with LTCC-based subsystem (1 ). The formed 5G phased array unit is suitable for forming larger arrays by multiplexing.