PLASMA DISPLAY DEVICE AND METHOD FOR DRIVING PLASMA DISPLAY PANEL

WIPO Patent Application WO/2008/072458

A1

A plasma display panel is provided with an accumulated time measuring circuit that measures an accumulated time for which an electric current passes through the plasma display panel and a scanning electrode driving circuit in which one field period is made up of a plurality of sub-fields (SF). Each sub-field is comprised of an initialization period during which a gradually dropping slope waveform voltage is applied to scanning electrodes (SC1-SCn), a writing period during which a negative scanning pulse (Va) is applied to the scanning electrodes (SC1-SCn), and a maintaining period. Further, the scanning electrode driving circuit generates the gradually dropping slope waveform voltage during the initialization period to initialize discharge cells and also generates the scanning pulse voltage (Va) to drive the scanning electrodes (SC1-SCn) during the writing period. The scanning electrode driving circuit changes the minimum voltage (Vi4) of the gradually dropping slope waveform voltage in accordance with the accumulated time the accumulated time measuring circuit has measured.

ORIGUCHI TAKAHIKO
SHOJI HIDEHIKO

PCT/JP2007/072648

June 19, 2008

November 22, 2007

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MATSUSHITA ELECTRIC IND CO LTD (JP)
ORIGUCHI TAKAHIKO
SHOJI HIDEHIKO

G09G3/28; G09G3/20; G09G3/288; G09G3/291; G09G3/292; G09G3/293; G09G3/294; G09G3/296; G09G3/298

WO2006132334A1	2006-12-14
WO2007091514A1	2007-08-16
WO2007097328A1	2007-08-30
WO2007099903A1	2007-09-07
WO2007099904A1	2007-09-07

JP2003015590A	2003-01-17
JP2003140601A	2003-05-16
JP2005234372A	2005-09-02
JP2007225986A	2007-09-06
JP2000242224A	2000-09-08

See also references of EP 2096622A4

IWAHASHI, Fumio et al. (1006, Oaza Kadom, Kadoma-shi Osaka 01, JP)

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