PLASMA DISPLAY PANEL AND METHOD FOR MANUFACTURING SAME

WIPO Patent Application WO/2010/122730

A1

Provided is a PDP wherein a discharge delay and a discharge start voltage are suppressed by improving the discharge characteristics of a protection layer and excellent image display performance can be exhibited with a highly fine cell structure. On the surface of a dielectric layer (7) of a front panel (2), a MgO layer (8) is disposed, and on the surface of the MgO layer (8), a first electron emitting material (16a), which is composed of MgO fine particles containing halogen atoms, and a second electron emitting material (16b), which is composed of fine particles of a compound having one or more kinds of elements selected from among Ca, Sr and Ba, and Sn as the main component, are dispersed. A protection layer (17) is composed of the MgO layer (8), the dispersed first electron emitting material (16a) and the dispersed second electron emitting material (16b).

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ASANO HIROSHI
INOUE OSAMU
SHIRAISHI SEIGO
OKUYAMA KOJIRO
MORITA YUKIHIRO
MIURA MASANORI
YOSHINO KYOHEI

PCT/JP2010/002637

October 28, 2010

April 12, 2010

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PANASONIC CORP (JP)
ASANO HIROSHI
INOUE OSAMU
SHIRAISHI SEIGO
OKUYAMA KOJIRO
MORITA YUKIHIRO
MIURA MASANORI
YOSHINO KYOHEI

H01J9/02; H01J11/12; H01J11/40

WO2009081589A1

2009-07-02

JP2008041438A	2008-02-21
JP2008293803A	2008-12-04
JP2004273158A	2004-09-30
JP2009170191A	2009-07-30

NAKAJIMA, Shiro et al. (JP)
Shiro Nakajima (JP)

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