Title:
POWER AMPLIFIER CIRCUIT, HIGH-FREQUENCY CIRCUIT, AND COMMUNICATION DEVICE
Document Type and Number:
WIPO Patent Application WO/2021/181751
Kind Code:
A1
Abstract:
The present invention suppresses a current that flows to a transistor of a final-stage amplifier. A power amplifier circuit (10) is provided with a drive-stage amplifier (1), a final-stage amplifier (3), a power terminal (T3), a first voltage control circuit (4), and a second voltage control circuit (5). The drive-stage amplifier (1) includes a first transistor (Q1) including a first input terminal (11), a first output terminal (12), and a first grounding terminal (13). The final-stage amplifier (3) includes a second transistor (Q3) including a second input terminal (31), a second output terminal (32), and a second grounding terminal (33). The first voltage control circuit (4) is connected between the power terminal (T3) and the first output terminal (12), and controls a first power supply voltage to be applied to the first transistor (Q1). The second voltage control circuit (5) is connected between the power terminal (T3) and the second output terminal (32), and controls a second power supply voltage to be applied to the second transistor (Q3).
Inventors:
TAHARA KENJI
TANAKA YUSUKE
SUKEMORI YOSHIAKI
TANAKA YUSUKE
SUKEMORI YOSHIAKI
Application Number:
PCT/JP2020/041757
Publication Date:
September 16, 2021
Filing Date:
November 09, 2020
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H03F1/02; H03F3/19; H03F3/24; H03F3/68
Foreign References:
| JP2019220873A | 2019-12-26 | |||
| JPH04126414U | 1992-11-18 | |||
| JP2007104280A | 2007-04-19 |
Attorney, Agent or Firm:
HOKUTO PATENT ATTORNEYS OFFICE (JP)
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