The invention relates to a method for splitting power.

Generally, methods are known for splitting power, viz. by connecting a multiple number of sub feeding lines to a single feeding line.

It is an object of the invention to provide a method for splitting power over a multiple number of output lines, without mutually connecting said output lines. Thereto, the method for splitting power comprises a step of receiving a sinusoidal power signal, a step of providing a multiple number of M output lines, and a step of consecutively switching between the M output lines such that, during a respective sub time period of a cycle time period of the received sinusoidal power signal, the sinusoidal power signal is forwarded to a corresponding individual output line of the M output lines, M being a natural number above one.

By providing switching means, the sinusoidal power signal can be forwarded to a multiple output lines, consecutively, during a corresponding sub time period in the cycle time period of the received sinusoidal signal, without the output hnes being physically connected.

The invention also relates to a power splitting unit.

Further, the invention relates to a computer program product. A computer program product may comprise a set of computer executable instructions stored on a data carrier, such as but not limited to a flash memory, a CD or a DVD. The set of computer executable instructions, which allow a programmable computer to carry out the method as defined above, may also be available for downloading from a remote server, for example via the Internet, e.g. as an app.

Other advantageous embodiments according to the invention are described in the following claims. It should be noted that the technical features described above or below may each on its own be embodied in a system or method, i.e. isolated from the context in which it is described, separate from other features, or in combination with only a number of the other features described in the context in which it is disclosed. Each of these features may further be combined with any other feature disclosed, in any combination.

By way of example only, embodiments of the present invention will now be described with reference to the accompanying figures in which

Fig. 1 shows a schematic view of a power splitting unit according to the invention;

Fig. 2 shows a diagram of a sinusoidal power signal, and

Fig. 3 shows a flow chart of a method according to the invention;

The figures merely illustrate a preferred embodiments according to the invention. In the figures, the same reference numbers refer to equal or corresponding parts.

Figure 1 shows a schematic view of a power splitting unit 1 according to the invention. The unit 1 is provided with an input terminal Ti connected to an input line L _m . The unit 1 is also provided with a multiple number of output terminal Ti-s connected to corresponding output lines Li-e. Further, the unit 1 has a neutral output terminal TN connected to a neutral output line N.

Additionally, the power splitting unit 1 comprises a time control unit 2 and switching means 3 processing a sinusoidal power signal, e.g. an 230V AC mains signal e.g. having a frequency of 50 Hz or 60 Hz or another frequency, received via the input L _m .

During operation of the power splitting unit 1 the received sinusoidal power signal is consecutively forwarded to each of the eight output lines, within a single cycle of the sinusoidal signal.

Figure 2 shows a diagram of a sinusoidal power signal H as a function of the time parameter t. A cycle time period CTP of the sinusoidal power signal H is divided into eight sub time periods STPi ,..., STPB. Here, the cycle time period CTP starts at time instant to and ends at time instant ts. As an example, the cycle time period CTP lasts 20 milliseconds, corresponding to a sinusoidal signal frequency of 50 Hz. However, the cycle time period CTP may last longer or shorter, corresponding to a lower or higher frequency, respectively, of the received sinusoidal signal H.

Similarly, each of the eight sub time periods STP _m , m = 1, ... , 8 starts at time instant t _m -i and ends at time instant t _m . Preferably, the time instants to, ..., ts are equally distributed over the cycle time period CTP. Then, the sub time periods STPi ... STPg have the same time duration. In principle, however, the sub time periods STP have a different time duration. The diagram in Fig. 2 shows the voltage of the sinusoidal power signal H.

Apparently, the current behavior of the sinusoidal power signal H is similar to the voltage behavior thereof.

During operation of the power splitting unit 1, the time control unit 2 divides the cycle time period CTP into the eight sub time periods. Further, the switching means 3 consecutively switch between the eight output terminals such that the input terminal Ti is interconnected to an individual output terminal T _m , m = 1, ..., 8 that corresponds with a respective sub time period STP _m , m = 1, ... , 8, of the cycle time period CTP of the sinusoidal power signal H.

That is, in a cycle period of the sinusoidal signal, during a first sub time period STPi, the input termin l Ti is interconnected to the first output terminal Ti. Then, the received sinusoidal power signal H is forwarded, via the switching means 3 and the first output terminal Ti to the first output line Lo. Similarly, during the second sub time period STP2, the input terminal Ti is interconnected to the second output terminal T2, forwarding the sinusoidal power signal H to the second output line L2. Also, the third, fourth, fifth, sixth, seventh and eighth output terminal T _m , respectively, is consecutively connected to the input terminal Ti for forwarding the received sinusoidal signal H to the third, fourth, fifth, sixth, seventh and eighth output line L _m , respectively, m = 3, 8.

Then, each of the individual output terminals T _m , m = 1, ..., 8 is individually connected, in the cycle time period CTP, via the switching means 3, to the input terminal T,. during the sub time period STP _m that is associated with the respective output terminal T _m . In principle, only a single output terminal T is connected, via the switching means 3, to the input terminal Ti.

Preferably, after a sub time period STP _m , m = 1, ... , 8 has lapsed, i.e. at time instants ti, ..., ts the switching means 3 switch from a first termin l of the output terminals T _m , m = 1 , ... , 8, to another terminal of the output terminals T _m , m = 1 , ... , 8. As an example, at time instant t ₄ , when the sub time period STP i has lapsed, the switching means 3 switch from output terminal T ₄ to output terminal Tr„ and so on.

Generally, each sub time period STP _m , m = 1 , ... , 8 in a cycle time period CTP can be associated with a corresponding output terminal T _m , m = 1, ... , 8, such that during each sub time period STP _m the switching means 3 are connected to the corresponding output terminal T _m that is associated with said sub time period STPm for forwarding the received sinusoidal power signal H to the corresponding output line L _m .

Advantageously, the switching means 3 can be arranged for repeatedly connecting to each individual output terminal T _m , over

consecutive cycle time periods CTP thereby splitting the received power signal H and distributing said signal over the output lines L _m , m = 1, ..., 8.

It is noted that the order of connection, via the switching means, between the individual output terminals T _m on the one hand and the input terminal Ti on the other hand, can be from m =1 to 8, i.e. in a consecutive order, or in another order, such as the reverse order from m=8 to 1, or in another fixed order, or at a random order. It is further noted that the number of output terminals T can be more or less than eight. As an example, the power splitting unit 1 has four, six, ten, eighteen, twenty or even more output terminals. Generally, when M output terminals T are applied, M being a natural number above one, also M output lines can be connected and, generally, the cycle time period CTP is divided into M sub time periods such that during each sub time period STPm, only the corresponding output terminal STP _m being associated with the respective sub time period STP _m is connected to the input terminal Ti, m = 1, ... , M.

Figure 3 shows a flow chart of a method according to the invention. The method is used for splitting power. The method 100 comprises a step of receiving 110 a sinusoidal power signal having a cycle time period, a step of providing 120 a multiple number of M output lines, and a step of consecutively switching 130 between the M output lines such that, during a respective sub time period of a cycle time period of the received sinusoidal power signal, the sinusoidal power signal is forwarded to a corresponding individual output hne of the M output lines, M being a natural number above one.

The method for splitting power can be performed using dedicated hardware structures, such as FPGA and/or ASIC components. Otherwise, the method can also at least partially be performed using a computer program product comprising instructions for causing a controller, a processor of a computer system or a control unit to perform the above described step of the method according to the invention, or at least a sub step of consecutively switching between the M output lines. All steps can in principle be performed on a single processor. However, it is noted that at least one sub-step can be performed on a separate processor. A processor can be loaded with a specific software module. Dedicated software modules can be provided. The invention is not restricted to the embodiments described herein. It will be understood that many variants are possible.

It is noted that the power splitting unit can be provided with a further unit, means or terminal. As an example, a clock terminal can be provided for receiving a clock signal synchronized with the received sinusoidal power signal.

These and other embodiments will be apparent for the person skilled in the art and are considered to fall within the scope of the invention as defined in the following claims. For the purpose of clarity and a concise description features are described herein as part of the same or separate embodiments. However, it will be appreciated that the scope of the invention may include embodiments having combinations of all or some of the features described.