Title:
POWER-DOWN PROTECTION METHOD AND APPARATUS, AND ELECTRONIC DEVICE
Document Type and Number:
WIPO Patent Application WO/2017/054487
Kind Code:
A1
Abstract:
A power-down protection method and apparatus, and an electronic device. The method is applied to the electronic device. The electronic device comprises a field programmable gate array (FPGA) unit. The method comprises: monitoring an electrical signal output by a power source, and when it is monitored that the fluctuation of the electrical signal is within a threshold value range, outputting a power-down indication signal marked as a first indication signal, and when it is monitored that the fluctuation of the electrical signal is beyond the threshold value range, outputting a power-down indication signal marked as a second indication signal (S101); and when it is monitored that the second indication signal is output, writing data synchronized with a processor unit, and a current system time into a non-volatile flash memory (Flash), and loading the stored data synchronized with the processor unit after the next power-on of the electronic device (S102).
Inventors:
ZHOU BIN (CN)
LIU LEISHAN (CN)
LIU LEISHAN (CN)
Application Number:
PCT/CN2016/084168
Publication Date:
April 06, 2017
Filing Date:
May 31, 2016
Export Citation:
Assignee:
ZTE CORP (CN)
International Classes:
G06F12/16
Foreign References:
| CN104035893A | 2014-09-10 | |||
| CN103984610A | 2014-08-13 | |||
| US20090172469A1 | 2009-07-02 | |||
| CN102622257A | 2012-08-01 | |||
| CN101010668A | 2007-08-01 |
Attorney, Agent or Firm:
AFD CHINA INTELLECTUAL PROPERTY LAW OFFICE (CN)
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