Title:
POWER GRID LAYOUT DESIGNS FOR INTEGRATED CIRCUITS
Document Type and Number:
WIPO Patent Application WO/2018/057778
Kind Code:
A3
Abstract:
Integrated circuit layouts are disclosed that include metal layers with metal tracks having separate metal sections along the metal tracks. The separate metal sections along a single track may be electrically isolated from each other. The separate metal sections may then be electrically connected to different voltage tracks in metal layers above and/or below the metal layer with the separate metal sections. One or more of the metal layers in the integrated circuit layouts may also include metal tracks at different voltages (e.g., power and ground) that are adjacent to each other within a power grid layout. The metal tracks may be separated by electrically insulating material. The metal tracks and the electrically insulating material between the tracks may create capacitance in the power grid layout.
Inventors:
SCHULTZ RICHARD T (US)
SCHMIDT REGINA TIEN (US)
PETERSON DEREK P (CA)
CHEN TE-HSUAN (US)
CONRAD ELIZABETH C (US)
MATHEIS IONESCU CATHERINA SIMONA (US)
WANG CHU-WEN (US)
SCHMIDT REGINA TIEN (US)
PETERSON DEREK P (CA)
CHEN TE-HSUAN (US)
CONRAD ELIZABETH C (US)
MATHEIS IONESCU CATHERINA SIMONA (US)
WANG CHU-WEN (US)
Application Number:
PCT/US2017/052775
Publication Date:
May 03, 2018
Filing Date:
September 21, 2017
Export Citation:
Assignee:
ADVANCED MICRO DEVICES INC (US)
International Classes:
H01L27/02; G06F17/50; H01L23/522; H01L23/528; H01L27/118; H01L49/02
Foreign References:
| US20070278528A1 | 2007-12-06 | |||
| US20130155753A1 | 2013-06-20 | |||
| US20070157144A1 | 2007-07-05 | |||
| US20100148219A1 | 2010-06-17 | |||
| US20140264742A1 | 2014-09-18 | |||
| US20160276287A1 | 2016-09-22 |
Attorney, Agent or Firm:
RANKIN, Rory D. (US)
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