POWER-ON RESET CIRCUIT

WIPO Patent Application WO/2017/173857

A1

A power-on reset circuit comprises the following sequentially and electrically connected components: a bias current generation module (1000); a power-on reset module (2000); and a feedback latch module (3000). The bias current generation module (1000) is used to generate a bias current. The power-on reset module (2000) is used to generate a power-on reset voltage signal. The power-on reset module (2000) comprises two series-connected switches (K0, K1). The bias current generated by the bias current generation module (1000) is adjusted by controlling turning on or off of the two series-connected switches (K0, K1), thereby adjusting a power-on reset time. The feedback latch module (2000) is used to latch the power-on reset voltage signal generated by the power-on reset module (2000) so as to suppress fluctuation of a source voltage between VIL-VIH inputted to an inverter in a power-on stage, thereby preventing spikes of an outputted power-on reset voltage signal. The feedback latch module (3000) further comprises a feedback branch consisting of two nMOSFETs (N3, N4) connected in series. The invention uses the feedback branch to perform feedback on the power-on reset voltage signal, thereby realizing faster stabilization of outputting a power-on reset voltage signal.

YANG RUICONG (CN)
LIN GUIJIANG (CN)
LIAO JIANPING (CN)
YANG FENGBIN (CN)
REN LIANFENG (CN)
LIU YUSHAN (CN)
SHEN BINXU (CN)

PCT/CN2016/112228

October 12, 2017

December 27, 2016

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XIAMEN NEWYEA MICROELECTRONICS TECH CO LTD (CN)

H03K17/22

CN105811941A	2016-07-27
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CN101114827A	2008-01-30
CN204465489U	2015-07-08
CN104935313A	2015-09-23
CN103997323A	2014-08-20
US20060087367A1	2006-04-27

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