Title:
POWER SUPPLY CIRCUIT, POWER MANAGEMENT CIRCUIT, AND SENSOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/223836
Kind Code:
A1
Abstract:
In the present invention, a power supply circuit for cold start (PS) comprises: clock generating circuits (10, 20) that generate an HOL clock from the output voltage of a harvester (EH); a DRV circuit group (30) in which the HOL clock is inputted to a DRV circuit (31), and n stages of DRV circuits that are provided with a capacitor (C) and a switch (M) and that boost and output the inputted NOL clock are connected in series; and a CP circuit group (40) in which the output voltage is inputted to a CP circuit (41), and n stages of CP circuits that are provided with a capacitor (C) and a switch (S) and that provide a twofold boost of the inputted output voltage and output the boosted voltage are connected in series. In the DRV circuit group, the boosted voltage from CP circuits (41 to 4n) of the CP circuit group is used to charge the capacitors (C) of DRV circuits (31 to 3n) of the respectively corresponding stage, the clock signal inputted from the preceding DRV circuit is superimposed on the boosted voltage via the capacitor (C), and the resulting voltage is outputted. This allows cold start to be performed at extremely low voltage by generating effective clock signals while using a simple circuit configuration.
Inventors:
HIROSE TETSUYA (JP)
SEBE HIKARU (JP)
SEBE HIKARU (JP)
Application Number:
PCT/JP2023/017122
Publication Date:
November 23, 2023
Filing Date:
May 02, 2023
Export Citation:
Assignee:
UNIV OSAKA (JP)
International Classes:
H02M3/07; H02M3/00
Foreign References:
| JPH08149799A | 1996-06-07 | |||
| US20160164404A1 | 2016-06-09 | |||
| JP2007502096A | 2007-02-01 | |||
| JPH04268294A | 1992-09-24 |
Attorney, Agent or Firm:
KAEDE PATENT ATTORNEYS' OFFICE (JP)
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