Title:
PRE-EMPHASIS SCHEME
Document Type and Number:
WIPO Patent Application WO2002102005
Kind Code:
A3
Abstract:
The disclosed method and circuitry for pre-emphasizing transmitted logic signals, may be applied to single-ended center-tapped terminated I/0 lines. In one embodiment, a driver circuit is configured for monitoring the logic values of signals transmitted by the driver circuit. The driver circuit compares the logic value of a next logic signal to be transmitted with a first and a second previously transmitted signal. Pre-emphasis of the next logic signal occurs based on the logic value of the next logic signal to be transmitted as well as the logic values of the first and second logic signals. If the first and second logic signals have the same logic value, and the next logic signal has a different value, the next logic value is pre-emphasized. If the next logic signal has a logic value that is equivalent to either the first logic signal or the second logic signal, it is transmitted without pre-emphasis.
Inventors:
JONG JYH-MING
CHAKRABARTI PRABHANSU
YUAN LEO
CHAKRABARTI PRABHANSU
YUAN LEO
Application Number:
PCT/US2002/016305
Publication Date:
May 01, 2003
Filing Date:
May 22, 2002
Export Citation:
Assignee:
SUN MICROSYSTEMS INC (US)
International Classes:
H04L25/02; H04L25/03; (IPC1-7): H04L25/02
Foreign References:
| EP0763917A2 | 1997-03-19 | |||
| US5896417A | 1999-04-20 | |||
| US5008903A | 1991-04-16 |
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