Title:
PRINTED CIRCUIT BOARD FOR DEGRADATION DETECTION
Document Type and Number:
WIPO Patent Application WO/2022/030320
Kind Code:
A1
Abstract:
Provided is a printed circuit board (20) for degradation detection, the printed circuit board (20) having an insulator substrate (22) and a wiring pattern (24) for degradation detection, the wiring pattern (24) being formed on an outer surface of the insulator substrate (22), and the printed circuit board (20) for degradation detection being attached to a main printed circuit board (10) for which degradation is to be detected. The wiring pattern (24) is formed on, of the outer surfaces of the insulator substrate (22), a back surface (32) positioned on the main printed circuit board (10) side. The insulator substrate (22) has a penetrating part (through hole (34), notch part (50)) penetrating from the back surface (32) to a front surface (30) positioned on the side opposite from the back surface (32).
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Inventors:
SAWADA TAKESHI (JP)
UENO FUYUKI (JP)
UENO FUYUKI (JP)
Application Number:
PCT/JP2021/027827
Publication Date:
February 10, 2022
Filing Date:
July 28, 2021
Export Citation:
Assignee:
FANUC CORP (JP)
International Classes:
H05K1/02; H05K3/00
Foreign References:
| JP2018041837A | 2018-03-15 | |||
| JP2011253849A | 2011-12-15 | |||
| JP2019153696A | 2019-09-12 |
Attorney, Agent or Firm:
CHIBA Yoshihiro et al. (JP)
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