PROCESS FOR PRODUCING IC CHIP

WIPO Patent Application WO/2006/013616

A1

A process for producing an IC chip as thin as 50 µm or less, such as an IC chip having a thickness of 25-30 µm, with high productivity. The process for producing an IC chip comprises a step 1 for fixing a wafer to a supporting plate by bonding a surface of a double-sided adhesive tape containing a gas generating agent to the wafer, which double-sided adhesive tape contains the gas generating agent that generates a gas when irradiated with light in at least one adhesive layer on either side, a step 2 for grinding the wafer while keeping it secured to the supporting plate through the double-sided adhesive tape, a step 3 for irradiating the double-sided adhesive tape with light, and a step 4 for separating the double-sided adhesive tape from the wafer. In this process, the gas discharge rate from the double-sided adhesive tape in the step 3 is not less than 5µL/cm²·min.

HATAI MUNEHIRO (JP)
HAYASHI SATOSHI (JP)
FUKUOKA MASATERU (JP)
DANJO SHIGERU (JP)
OYAMA YASUHIKO (JP)
SHIMOMURA KAZUHIRO (JP)
SUGITA DAIHEI (JP)
KITAJIMA YOSHIKAZU (JP)

PCT/JP2004/011057

February 09, 2006

August 02, 2004

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SEKISUI CHEMICAL CO LTD (JP)
HATAI MUNEHIRO (JP)
HAYASHI SATOSHI (JP)
FUKUOKA MASATERU (JP)
DANJO SHIGERU (JP)
OYAMA YASUHIKO (JP)
SHIMOMURA KAZUHIRO (JP)
SUGITA DAIHEI (JP)
KITAJIMA YOSHIKAZU (JP)

C09J7/38; (IPC1-7): H01L21/02; H01L21/68; C09J201/00; C09J5/00; C09J7/02

JP2003171645A	2003-06-20
JP2003231875A	2003-08-19
JPH09291070A	1997-11-11

Yasutomi, Yasuo (4-20 Nishinakajima 5-chome, Yodogawa-k, Osaka-shi Osaka 11, JP)

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