Title:
PROCESS FOR PRODUCING SEMICONDUCTOR ARTICLE USING GRADED EXPITAXIAL GROWTH
Document Type and Number:
WIPO Patent Application WO2002015244
Kind Code:
A3
Abstract:
A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded SIl-xGex(x increases from 0 to y) is deposited on a first silicone substrate, followed by deposition of a relaxed Sil-yGey layer, a thin strained Sil-zGez layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Sil-yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Sil-yGey layer remains on the second substrate. In another exemplary embodiment, a graded Sil-xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects. Hydrogen ions are introduced into the relaxed GaAs layer at the selected depth. The relaxed GaAs layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the hydrogen ion rich layer, such that the upper portion of relaxed GaAs layer remains on the second substrate.
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Inventors:
FITZGERALD EUGENE A
ANTONIADIS DIMITRI A
HOYT JUDY L
ANTONIADIS DIMITRI A
HOYT JUDY L
Application Number:
PCT/US2001/041680
Publication Date:
October 31, 2002
Filing Date:
August 10, 2001
Export Citation:
Assignee:
CHENG ZHI YUAN (US)
International Classes:
H01L21/02; H01L21/20; H01L21/205; H01L21/762; H01L27/12; (IPC1-7): H01L21/205; H01L21/331
Foreign References:
| US5759898A | 1998-06-02 | |||
| US5906951A | 1999-05-25 | |||
| US5442205A | 1995-08-15 |
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