Title:
PROCESSING METHOD FOR ABNORMALITY OF CLOCK INPUT SIGNAL OF LEVEL CONVERTER
Document Type and Number:
WIPO Patent Application WO/2019/061875
Kind Code:
A1
Abstract:
A processing method for the abnormality of a clock input signal of a level converter, the processing method comprising: counting pulses of a first clock input signal to obtain a first serial number, and counting pulses of a second clock input signal to obtain a second serial number (S10); according to the first serial number and the second serial number, determining whether the pulses of the first clock input signal or the pulses of the second clock input signal are lost (S20); when the pulses are lost, adjusting the first serial number or the second serial number (S30); and when pulses occur after the lost pulses of the first clock input signal or the second clock input signal, controlling a high and low level of an output clock signal corresponding to the previous serial number of the adjusted serial number of the occurring pulses, and controlling a high and low level of an output clock signal corresponding to the adjusted serial number of the occurring pulses (S40). By means of the processing method for the abnormality of a clock input signal of a level converter, the abnormality of output signals can be avoided in the case of abnormality of pulses.
Inventors:
ZHANG XIANMING (CN)
Application Number:
PCT/CN2017/117032
Publication Date:
April 04, 2019
Filing Date:
December 18, 2017
Export Citation:
Assignee:
SHENZHEN CHINA STAR OPTOELECT (CN)
International Classes:
H03K19/0175
Foreign References:
| CN1904994A | 2007-01-31 | |||
| CN101764594A | 2010-06-30 | |||
| CN105099435A | 2015-11-25 | |||
| US20080298535A1 | 2008-12-04 | |||
| JP2002271427A | 2002-09-20 |
Attorney, Agent or Firm:
MING & YUE INTELLECTUAL PROPERTY LAW FIRM (CN)
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