Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
PRODUCTION METHOD FOR SILICON WAFER AND SILICON WAFER AND SOI WAFER
Document Type and Number:
WIPO Patent Application WO/2003/046968
Kind Code:
A1
Abstract:
A production method for a silicon wafer comprising a lapping process by at least free abrasive grains, and an etching process by an alkali etchant, characterized in that in the lapping process lapping is performed by using free abrasive grains having a maximum grain size of up to 21 μm and an average grain size of up to 8.5 μm, and then in the etching process etching is performed by using as an alkali etchant an alkali aqueous solution having an alkali component concentration of at least 50 Wt.%&semi and a silicon wafer produced by this method. Accordingly, the production method that can prevent deterioration in wafer surface roughness and in flatness of a wafer as a whole, and a silicon wafer produced by the method are provided.

Inventors:
IIZUKA NAOTO (JP)
NIHONMATSU TAKASHI (JP)
YOSHIDA MASAHIKO (JP)
MIYAZAKI SEIICHI (JP)
Application Number:
PCT/JP2002/012276
Publication Date:
June 05, 2003
Filing Date:
November 25, 2002
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SHINETSU HANDOTAI KK (JP)
IIZUKA NAOTO (JP)
NIHONMATSU TAKASHI (JP)
YOSHIDA MASAHIKO (JP)
MIYAZAKI SEIICHI (JP)
International Classes:
B24B37/00; H01L21/762; B24B37/04; C09K13/02; C09K13/08; H01L21/02; H01L21/302; H01L21/304; H01L21/306; H01L21/308; H01L27/12; (IPC1-7): H01L21/304
Foreign References:
JP2001102331A2001-04-13
US6099748A2000-08-08
JP2001338899A2001-12-07
JPH0737871A1995-02-07
JP2001208743A2001-08-03
EP1134808A12001-09-19
Attorney, Agent or Firm:
Yoshimiya, Mikio (Motoasakusa 2-chome Taito-ku, Tokyo, JP)
Download PDF: