Title:
PROTECTING APPARATUS, AND PROTECTING METHOD, SIGNAL PROCESSING METHOD AND ELECTRICAL QUANTITY DETECTING METHOD EMPLOYED BY THE PROTECTING APPARATUS
Document Type and Number:
WIPO Patent Application WO/2008/004445
Kind Code:
A1
Abstract:
A protecting apparatus protects an electronic device (3) by detecting the temperature
of a prescribed monitoring area in the electronic device (3). The protecting
apparatus is provided with an oscillation circuit (20) for generating a clock
signal (Vck) having a prescribed cycle and a prescribed on-time, and a temperature
detecting circuit (16) for detecting the temperature of the monitoring area
while the clock signal (Vck) is turned on. The protecting apparatus interrupts
supply of power to the electronic device (3) when the temperature of the monitoring
area exceeds a prescribed temperature.
Inventors:
IKEUCHI YOSHITAKA
SHIGEMI TOMOYA
ISHII TAKUYA
NAKASHIMA NOBORU
SHIGEMI TOMOYA
ISHII TAKUYA
NAKASHIMA NOBORU
Application Number:
PCT/JP2007/062486
Publication Date:
January 10, 2008
Filing Date:
June 21, 2007
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD (JP)
IKEUCHI YOSHITAKA
SHIGEMI TOMOYA
ISHII TAKUYA
NAKASHIMA NOBORU
IKEUCHI YOSHITAKA
SHIGEMI TOMOYA
ISHII TAKUYA
NAKASHIMA NOBORU
International Classes:
G01K7/24; H02H5/04; H02H3/087
Foreign References:
| JP2001022451A | 2001-01-26 | |||
| JPH11319395A | 1999-11-24 | |||
| JP2004248415A | 2004-09-02 | |||
| JP2004024551A | 2004-01-29 | |||
| JP2006033411A | 2006-02-02 | |||
| JP2005051931A | 2005-02-24 | |||
| JPH0983742A | 1997-03-28 |
Attorney, Agent or Firm:
MAEDA, Hiroshi et al. (5-7 Hommachi 2-chome, Chuo-k, Osaka-shi Osaka 53, JP)
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