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Title:
PULSE WIDTH MODULATION SCHEME WITH REDUCED HARMONICS AND SIGNAL IMAGES
Document Type and Number:
WIPO Patent Application WO/2013/138645
Kind Code:
A1
Abstract:
A sigma-delta modulator (SDM) (102) modifies an input signal received from a digital modulator (202) to generate a noise-shaped signal for a digital pulse-width modulator (PWM) (204) formed from a plurality of noise-shaping levels. PWM (204) generates a pulse stream from the noise-shaped signal over a plurality of periods, where each period has a plurality of frames. The pulse stream also includes a plurality of pulse sets, where each pulse set is associated with at least one of the noise-shaping levels, and, for each pulse set having a total pulse width for its period that is less than its period and greater than zero, each pulse set includes at least one pulse in each frame for its period. An amplification stage (106) generates an RF signal from the pulse stream, which is filtered by filter (206) and applied to an antenna load (208).

Inventors:
DING, Lei (4512 Tuscany Dr, Plano, TX, 75093, US)
HEZAR, Rahmi (1847 Nueces Dr, Allen, TX, 75013, US)
HUR, Joonhoi (15190 Prestonwood Blvd, Dallas, TX, 75248, US)
HAROUN, Baher, S. (906 Pampa Dr, Allen, TX, 75013, US)
Application Number:
US2013/031621
Publication Date:
September 19, 2013
Filing Date:
March 14, 2013
Export Citation:
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Assignee:
TEXAS INSTRUMENTS INCORPORATED (P.O. Box 655474, Mail Station 3999Dallas, TX, 75265-5474, US)
TEXAS INSTRUMENTS JAPAN LIMITED (24-1, Nishi-Shinjuku 6-chomeShinjuku-ku Tokyo, 160-8366, JP)
International Classes:
H03M3/02; H03F3/217; H03K7/08
Foreign References:
US7209064B1
US20060152264A1
US20110064245A1
EP2081295A1
US20070176660A1
Attorney, Agent or Firm:
FRANZ, Warren, L. et al. (TEXAS INSTRUMENTS INCORPORATED, Deputy General Patent Counsel, P.O. Box 4, 75265-5474, US)
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Claims:
CLAIMS

What is claimed is:

1. An apparatus comprising:

a noise shaping circuit having a plurality of output levels; and

a pulse width modulator (PWM) that is coupled to the noise shaping circuit, wherein the PWM is configured to generate a plurality of PWM signals, wherein each PWM signal corresponds to at least one of the plurality of output levels, and wherein each PWM signal is configured to be output over a PWM period, and wherein the PWM period is configured to include a plurality of frames, and wherein the plurality of PWM signals include a set of PWM signals having a total pulse width for each PWM period that is less than the PWM period and greater than zero, and wherein each PWM signal from the set of PWM signals includes at least one pulse in each frame when generated.

2. The apparatus of Claim 1, wherein the noise shaping circuit is configured to be clocked by a first clock signal having a first frequency, and wherein the PWM is configured to be clocked by a second clock signal having a second frequency, and wherein the second frequency is N-l times the first frequency, and wherein N is the number of output levels.

3. The apparatus of Claim 2, wherein the noise shaping circuit further comprises a sigma-delta modulator (SDM).

4. The apparatus of Claim 3, wherein each PWM signal is symmetrical about the center of the PWM period.

5. The apparatus of Claim 4, wherein the PWM signal has two frames.

6. The apparatus of Claim 3, wherein each PWM signal is asymmetrical about the center of the PWM period.

7. The apparatus of Claim 6, wherein the PWM signal has two frames.

8. A method comprising:

receiving input signal;

generating a noise-shaped signal from the input signal, wherein the noise-shaped signal is formed from a plurality of noise-shaping levels; and

generating a pulse stream from the noise-shaped signal over a plurality of periods, wherein each period has a plurality of frames, and wherein the pulse stream includes a plurality of pulse sets, wherein each pulse set is associated with at least one of the noise-shaping levels, and wherein, for each pulse set having a total pulse width for its period that is less than its period and greater than zero, each pulse set includes at least one pulse in each frame for its period.

9. The method of Claim 8, wherein the method further comprises generating a radio frequency (RF) signal from the pulse stream.

10. The method of Claim 9, wherein the step of generating the noise-shaped signal further comprises generating the noise-shaped signal from the input signal using sigma-delta modulation.

11. The method of Claim 10, wherein the step of generating the noise-shaped signal is performed at a first frequency, and wherein the step of generating the pulse stream is performed at a second frequency, and wherein the second frequency is N-1 times the first frequency, and wherein N is the number of noise-shaped levels.

12. The method of Claim 11, wherein each pulse set is symmetrical about the center of its period.

13. The method of Claim 12, wherein each period has two frames.

14. The method of Claim 11, wherein each pulse set is asymmetrical about the center of its period. The method of Claim 14, wherein each period has two frames.

Description:
PULSE WIDTH MODULATION SCHEME

WITH REDUCED HARMONICS AND SIGNAL IMAGES

[0001] This relates generally to a radio frequency (RF) amplifier and, more particularly, to a pulse width modulator (PWM) for an RF amplifier.

BACKGROUND

[0002] Turning to FIGS. 1 and 2, an example of a PWM amplifier 100 can be seen. In operation, the PWM amplifier 100 receives input signal IN at the sigma-delta modulator (SDM) 102. Assuming that the SDM 102 uses oversampling, this SDM 102 can spread the total noise power over the oversampling frequency band (which is generally larger than the band-of- interest) so as to reduce in-band noise. Typically, the SDM 102 has a number of noise-shaping or output levels (i.e., 17 levels from -8 to +8) that are used to generate a noise-shaped signal. The noise-shaped signal is then applied to the digital PWM 104 so as to generate a pulse width modulated pulse stream that is generally comprised of PWM signals (each of which corresponds to a noise-shaped or output level). As shown in FIG. 2, the PWM signals (which are used to form the pulse stream) are uniformly distributed about the center of the PWM period. This pulse stream can then be applied to the amplification stage 106 (which can, for example, be comprised of a digital-to-analog converter (DAC) and amplifier (i.e., class AB) or a switching amplifier (i.e., class D)).

[0003] One problem with this amplifier 100 is the nonlinear nature of the digital PWM

104. Some of the in-band nonlinearity associated with the digital PWM 104 can be corrected using predistortion or feedback control, but signal images and nonlinear components can be created at high frequencies (as shown in FIG. 3). As a result of having this high frequency content, the amplification stage 106 should have high linearity; otherwise the high frequency content will fold in-band, limiting in-band linearity. Additionally, this high frequency content can unnecessarily use power. This high frequency content should also be attenuated by high- order analog filters in order to meet spectral requirements. Thus, there is a need for an improved PWM amplifier. [0004] Some examples of conventional systems are: U.S. Patent No. 7,209,064; U.S.

Patent No. 7,327,296; U.S. Patent No. 7,425,853; U.S. Patent No. 7,782,238; and U.S. Patent No. 7,830,289.

SUMMARY

[0005] An embodiment provides an apparatus that comprises a noise shaping circuit having a plurality of output levels; and a pulse width modulator (PWM) that is coupled to the noise shaping circuit, wherein the PWM is configured to generate a plurality of PWM signals, wherein each PWM signal corresponds to at least one of the plurality of output levels, and wherein each PWM signal is configured to be output over a PWM period, and wherein the PWM period is configured to include a plurality of frames, and wherein the plurality of PWM signals includes a set of PWM signals having a total pulse width for each PWM period that is less than the PWM period and greater than zero, and wherein each PWM signal from the set of PWM signals includes at least one pulse in each frame when generated.

[0006] In one form, the noise shaping circuit may be configured to be clocked by a first clock signal having a first frequency, and wherein the PWM is configured to be clocked by a second clock signal having a second frequency, and wherein the second frequency is N-l times the first frequency, and wherein N is the number of output levels.

[0007] The noise shaping circuit may further comprise a sigma-delta modulator (SDM).

Each PWM signal may be symmetrical about the center of the PWM period. The PWM signal may have two frames.

[0008] Another embodiment provides a method that comprises receiving an input signal; generating a noise-shaped signal from the input signal, wherein the noise-shaped signal is formed from a plurality of noise-shaping levels; and generating a pulse stream from the noise-shaped signal over a plurality of periods, wherein each period has a plurality of frames, and wherein the pulse stream includes a plurality of pulse sets, wherein each pulse set is associated with at least one of the noise-shaping levels, and wherein, for each pulse set having a total pulse width for its period that is less than its period and greater than zero, each pulse set includes at least one pulse in each frame for its period.

[0009] In one form, the method further comprises generating a radio frequency (RF) signal from the pulse stream. [0010] The step of generating the noise-shaped signal may further comprise generating the noise-shaped signal from the input signal using sigma-delta modulation.

[0011] The step of generating the noise-shaped signal may be performed at a first frequency, and wherein the step of generating the pulse stream is performed at a second frequency, and wherein the second frequency is N-1 times the first frequency, and wherein N is the number of noise-shaped levels.

[0012] Each pulse set may be symmetrical about the center of its period. Each period may, for example, have two frames.

[0013] In another apparatus embodiment, the apparatus comprises a digital modulator; an

SDM that is coupled to the digital modulator, wherein the SDM is clocked by a first clock signal having a first frequency, and wherein the SDM has a plurality of noise-shaped levels; a PWM that is coupled to the SDM, wherein the PWM is clocked by a second clock having a second frequency so as to have a PWM period with a plurality of frames, and wherein the PWM is configured to generate a PWM signal for each noise-shaped level such that, for each PWM signal having a total pulse width for the PWM period that is less than the PWM period and greater than zero, there is at least one pulse in each frame; and an amplifier that is coupled to the PWM.

[0014] The apparatus may further comprise a filter that is coupled to the amplifier.The second frequency may be N-1 times the first frequency, and wherein N is the number of noise- shaped levels. The PWM may further comprise a lookup table that stores the PWM signal for each noise-shaped level. The PWM signal for each noise may be selected to be symmetrical about the center of the PWM period.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG. 1 is a diagram of an example of a conventional PWM amplifier;

[0016] FIG. 2 is a diagram depicting the PWM signals used by the digital PWM of FIG. i;

[0017] FIG. 3 is a log-scale plots depicting signal images and nonlinear components created as a result of the nonlinear behavior of the digital PWM of FIG. 1;

[0018] FIG. 4 is a diagram of an example of a PWM amplifier and load in accordance with an embodiment of the present invention;

[0019] FIG. 5 is a diagram depicting PWM signals that are symmetrical about the center of the PWM period used by digital PWM of FIG. 4; [0020] FIG. 6 is a log-scale plots depicting signal images and nonlinear components created as a result of the nonlinear behavior of the digital PWM of FIG. 4 that is employing the PWM signals of FIG. 5;

[0021] FIGS. 7A to 7D are diagrams depicting alternative PWM signals that are symmetrical about the center of the PWM period used by digital PWM of FIG. 4;

[0022] FIG. 8 is a diagram depicting PWM signals that are asymmetrical about the center of the PWM period used by digital PWM of FIG. 4; and

[0023] FIG. 9 is a log-scale plots depicting signal images and nonlinear components created as a result of the nonlinear behavior of the digital PWM of FIG. 4 that is employing the PWM signals of FIG. 8.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

[0024] FIG. 4 illustrates an example of a PWM amplifier 200. In this example, a digital modulator 202 provides a signal to SDM 102 (which is generally clocked by clock signal CLKl having a frequency F s and which, for example, can have 17 noise-shaped or output levels ranging from -8 to +8). The SDM 102 modifies the signal from the digital modulator 202 to generate a noise-shaped signal for the digital PWM 204 (which is generally clocked by clock signal CLK2 having a frequency 16Fs). Typically, the frequency of clock signal CLK2 is related to the number of output levels of SDM 102 (i.e., 17) and the frequency of clock signal CLKl . Amplification stage 106 can then generate an RF signal from the pulse stream output from the digital PWM 204, which can be filtered by filter 206 and applied to load 208 (i.e., antenna).

[0025] One difference between amplifiers 100 and 200, though, lies in the PWM signals employed by digital PWM 204. In FIG. 5, an example of a set of PWM signals that correspond to the output levels from SDM 102 can be seen (which can, for example, be stored in a lookup table within PWM 204). As shown in FIG. 5, the PWM period is divided into two frames, and the PWM signals are symmetric about the center of the PWM period. But, these PWM signals are not uniformly distributed about the center as the PWM signals shown in FIG. 2; instead, for each PWM signal that has a total pulse width that is less than the entire PWM period and greater than zero (which would generally include, for this example, all of the PWM signals except for output levels -8, +8 and 0), there is a pulse in each frame. The total pulse width for each PWM signal shown in the example of FIG. 5, though, is generally equal to the total pulse width for the corresponding PWM signal shown in FIG. 2. By doing this, close-in harmonics and signal images can be attenuated as shown in the FIG. 6, while also increasing linearity (i.e., from - 116dB to -126dB). Other alternative PWM signals (which are shown to be symmetric about the center of the PWM period that has two frames) can be seen in FIGS. 7 A to 7D.

[0026] A reason for these improvements can be seen with a spectral analysis. Looking, for example, to the PWM signal that corresponds to the +1 output level in FIG. 5 (which, as shown, is "0001000000001000"), the discrete-time Fourier transform for this PWM signal is:

Y(PWM\) =∑χ{η)β- ίωη = + e xlcoi

Now, looking, for example, to the PWM signal that corresponds to the +2 output level in FIG. 5 (which, as shown, is "0001100000011000"), the discrete-time Fourier transform for this PWM signal is:

N-l

Y(PWM2) =∑x(n)e- ian = e ~ o}i + e ~4o}i + e l loi + e ll0]i

= e -7.5cm ( \e 4.5cm + , e 3.5 AX + . e -3.5cm + , e -4.5cm ) \

(2) = 2e- 7 - 5 ^(cos(4.5^)+ cos(3.5^)) = 4e ~730)1 cos(4<¾)cos(0.5<¾)

As can be seen from equations (1) and (2), both PWM signals have a common phase term (i.e., -7.5 mi

£ ). This phase term and the corresponding magnitude response allow for more linearity at low frequency (i.e., 0 to Fs). Additionally, the energy at frequency Fs (which is generally the frequency of clock signal CLK1) is lower compared to the PWM signals of FIG. 2.

[0027] As another alternative (an example of which can be seen in FIG. 8), the PWM signals may be asymmetric about the center of the PWM period. As shown in the example of FIG. 8, the PWM period is divided into two frames (similar to FIGS. 5 and 7A to 7D), and, for each PWM signal that has a total pulse width that is less than the entire PWM period and greater than zero (which would generally include, for this example, all of the PWM signals except for output levels -8, +8 and 0), there is a pulse in each frame (also similar to FIGS. 5 and 7 A to 7D). Yet, the pulses are "off center." This allows close-in harmonics and signal images to be attenuated as shown in the FIG. 9, where there is better response for the signal images compared to FIG. 6. However, the in-band linearity is degraded, meaning that there is a tradeoff between response for the signal images and in-band linearity. Other alternative PWM signals that are asymmetric about the center of the PWM (similar to those shown symmetric PWM signals seen in FIGS. 7 A to 7D) can also be employed, but have been omitted for the sake of simplicity of illustration.

[0028] Similar to FIG. 5, a reason for the improvements associated with FIG. 8 can be seen in a spectral analysis. Looking, for example, to the PWM signal that corresponds to the +1 output level in FIG. 8 (which, as shown, is "0001000000010000"), the discrete-time Fourier transform for this PWM signal is:

Now, looking, for example, to the PWM signal that corresponds to the +2 output level in FIG. 8 (which, as shown, is "0001100000011000"), the discrete-time Fourier transform for this PWM signal is:

Y(PWM2) =∑x(n)e- icm = e 1,(01 + e coi + e coi + e

n=0

- e -7.5cm ( \e 4.5cm + . e 3.5 em + e -3.5 em + e -4.5cm )

(4) = 2 e - 7 5ft¾ (cos(4.5<¾)+ cos(3.5<¾))

= Ae 15coi cos(4<¾)cos(0.5<¾)

As can be seen from equations (3) and (4), both PWM signals have a common frequency term

-7 ft¾ -7.5 cm

(i.e., 4ω), but different phase terms (i.e., and ). Thus, there is less linearity compared to the PWM signals of FIG. 5. Additionally, with the PWM signals of FIG. 9, all of the codes or PWM signals have nulls at frequency Fs (which is generally the frequency of clock signal CLKl) that reduces harmonics and images compared to the PWM signals of FIGS. 2 and 6. Moreover, these PWM schemes (both symmetric and asymmetric) can be employed when the pulse stream (use of PWM signals) is mixed with a carrier so as to be located at a carrier frequency as opposed to direct current (DC).

[0029] Those skilled in the art will appreciate that many other embodiments and variations of the described embodiments are possible within the scope of the claimed invention.