BACKGROUND

Field

[0001] Embodiments of the present disclosure generally relate to forming ceramic films. More particularly, embodiments of the present disclosure relate to methods of forming amorphous or nano-crystalline ceramic films.

Description of the Related Art

[0002] Ceramic films, such as titanium dioxide ( PO2), are used in the formation of optical devices such as waveguides, color filters and two dimensional lenses. The functionality of these devices is impacted by the ability to form accurate shapes with very fine detail.

[0003] During deposition of thick ceramic films, such as titanium dioxide (T1O2) with a thickness greater than 500 Angstroms (A), the structure of the films moves from amorphous or nano-crystalline structures to crystalline structures. Large crystalline structures negatively impact the ability to pattern the ceramic films to make smooth structures as the sidewalls of patterned, thick ceramic films have excessive roughness. Current methods include the use of lower substrate temperatures during film growth to discourage the onset of crystalline formation. However, lower substrate temperatures inhibit crystalline formation only briefly and ceramic films of greater than 500 A would exhibit large crystalline formations.

[0004] Accordingly, what is needed in the art are improved methods of forming thick, amorphous or nano-crystalline ceramic films.

SUMMARY

[0005] In one embodiment, a method is provided. The method includes depositing a ceramic layer on a substrate using a physical vapor deposition (PVD) process, discontinuing the PVD process when the ceramic layer has a predetermined layer thickness, sputter etching the ceramic layer for a predetermined period of time, and repeating the depositing the ceramic layer using the PVD process, the discontinuing the PVD process, and the sputter etching the ceramic layer until a ceramic film with a predetermined film thickness is formed.

[0006] In another embodiment, a method is provided. The method includes introducing a substrate to a physical vapor deposition (PVD) chamber and depositing a ceramic layer on the substrate using a PVD process, discontinuing the PVD process when the ceramic layer has a predetermined layer thickness and removing the substrate from the PVD chamber, introducing the substrate to a sputter etch chamber and sputter etching the ceramic layer for a predetermined period of time, and repeating the depositing the ceramic layer using the PVD process, the discontinuing the PVD process, and the sputter etching the ceramic layer until a ceramic film with a predetermined film thickness is formed.

[0007] In yet another embodiment, a method is provided. The method includes introducing a substrate to a physical vapor deposition (PVD) chamber. The PVD chamber has a process volume defined by a chamber body. The process volume includes a target and a pedestal operable to support the substrate. The target is connected to a target switch that when engaged connects the target to a DC power supply operable to provide a pulsed DC power to the target. The pedestal is connected to a pedestal switch that when engaged connects the pedestal to a pulsed radio frequency (RF) power supply operable to provide a RF power to the pedestal. A ceramic layer is deposited on the substrate using a PVD process, the PVD process. The PVD process includes providing a first flow of a sputter gas and a flow of a reactive gas to the process volume and connecting the target to the pulsed DC power supply. The PVD process is discontinued when the ceramic layer has a predetermined layer thickness. In the PVD chamber the ceramic layer is sputter etched for a predetermined period of time. The sputter etching includes providing a second flow of a sputter gas to the process volume and connecting the pedestal to the RF power supply. The depositing the ceramic layer using the PVD process, discontinuing the PVD process, and the sputter etching the ceramic layer is repeated until a ceramic film with a predetermined film thickness is formed.

BRIEF DESCRIPTION OF THE DRAWINGS

[0008] So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only exemplary embodiments and are therefore not to be considered limiting of its scope, and may admit to other equally effective embodiments.

[0009] Figure 1 is a flow diagram illustrating operations of a method for forming an amorphous or nano-crystalline ceramic film according to an embodiment.

[0010] Figures 2A-2C are schematic, cross-sectional views of a substrate during the method for forming an amorphous or nano-crystalline ceramic film according to an embodiment.

[0011] Figure 3A is a schematic cross-sectional view of a physical vapor deposition (PVD) chamber according to an embodiment.

[0012] Figure 3B is a schematic cross-sectional view of a sputter etch chamber according to an embodiment.

[0013] Figure 3C is a schematic cross-sectional view of a PVD chamber according to an embodiment.

[0014] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.

DETAILED DESCRIPTION

[0015] Embodiments described herein methods of forming amorphous or nano crystalline ceramic films. The method includes depositing a ceramic layer on a substrate using a physical vapor deposition (PVD) process, discontinuing the PVD process when the ceramic layer has a predetermined layer thickness, sputter etching the ceramic layer for a predetermined period of time, and repeating the depositing the ceramic layer using the PVD process, discontinuing the PVD process, and the sputter etching the ceramic layer until a ceramic film with a predetermined film thickness is formed. [0016] Figure 1 is a flow diagram illustrating operations of a method 100 for forming an amorphous or nano-crystalline ceramic film 200, as shown in Figures 2A- 2C. An automated, multi-chambered physical vapor deposition (PVD) system, such as the Endura Sputtering System available from Applied Materials, Inc. located in Santa Clara, Calif., may be utilized to perform the method 100 for forming an amorphous or nano-crystalline ceramic film 200.

[0017] Prior to operation 101 , a substrate 201 may be introduced to high vacuum conditions in a load lock chamber and transitioned to a chamber for a substrate preparation step to desorb water from the substrate 201. The substrate 201 may be a silicon wafer or a wafer comprising glass, quartz or other materials used in the formation of optical devices. In one embodiment, which can be combined with other embodiments described herein, the wafer preparation step includes degassing in a radiant heat chamber. In another embodiment, which can be combined with other embodiments described herein, the wafer preparation step incudes sputter etching in a sputter etch chamber.

[0018] At operation 101 , a first ceramic layer 202a is deposited on the substrate using a PVD process. In one embodiment, which can be combined with other embodiments described herein, the PVD process is sputter deposition process. The substrate 201 is introduced into a PVD chamber and the first ceramic layer 202a is deposited utilizing a plasma of a sputter gas, such as argon (Ar), and a reactive gas, such oxygen (0 ₂ ), to bombard a negatively biased target with argon ions to sputter atoms of the target material, which thereafter coat a substrate with a layer of the target material. The deposited target material reacts with the reactive gas to form the ceramic layer. The first ceramic layer 202a may include titanium dioxide (Ti0 ₂ ), tantalum pentoxide (Ta ₂ Os), or aluminium(lll) oxide (AI ₂ 0 ₃ ) materials. In one embodiment, which can be combined with other embodiments described herein, the sputter gas includes Ar, the reactive gas includes 0 ₂ , and the target material includes titanium (Ti) to form a Ti0 ₂ layer.

[0019] According one embodiment, which can be combined with other embodiments described herein, the PVD process is performed in a PVD chamber 300A. It is to be understood that the PVD chamber 300A described herein is an exemplary PVD chamber and other PVD chambers, including PVD chambers from other manufacturers, may be used with or modified to accomplish aspects of the present disclosure. As shown in Figure 3A, a schematic cross-sectional view of the PVD chamber 300A, the PVD chamber 300A includes a process volume 302 defined by a chamber body 301. The process volume 302 has a target 310 and pedestal 304 operable to support the substrate 201. The pedestal 304 is coupled to and movably disposed in the process volume 302 by a stem 306 connected to a lift system (not shown) that moves the pedestal 304 between an elevated processing position and a lowered position that facilitates transfer of the substrate 201 to and from the PVD chamber 300A through an opening 308 of the chamber body 301.

[0020] The target 310 is connected to a power supply 312, such as a DC power supply, a RF power supply, an AC power supply, a pulsed DC power supply, and a pulsed RF power supply. A sputter gas flow controller 318, such as a mass flow control (MFC) device, is disposed between a sputter gas source 314 and the process volume 302 to control a flow of the sputter gas from the sputter gas source 314 to the process volume 302. A reactive gas flow controller 320, such as a MFC device, is disposed between a reactive gas source 316 and the process volume 302 to control a flow of the reactive gas from the reactive gas source 316 to the process volume 302. In one embodiment, which can be combined with other embodiments described herein, a flow rate of Ar is about 20 seem to about 100 seem and a flow rate of 0 ₂ is about 20 seem to about 100 seem. A controller 303 is coupled to the PVD chamber 300A and configured to control aspects of the PVD chamber 300A during processing. At operation 101 , the target 310 is negatively biased via the pulsed DC power supply providing a pulsed DC power. It is to be understood that while the discussion of Figure 1 and Figure 3A references pulsed DC power, operation 101 is contemplated to be performed with other power supplies as mentioned above with the understanding that appropriate adjustments to accommodate the different power supplies may occur. In one embodiment, which can be combined with other embodiments described herein, the pulsed DC power has a frequency of about 100 kilohertz (kHz), a duty cycle of about 50% to about 90%, such as 70%, and a power level of about 1 kilowatt (kW) to about 10 kW. In another embodiment, which can be combined with other embodiments described herein, the pulsed DC power is provided for about 100 seconds to about 300 seconds. [0021] According another embodiment, which can be combined with other embodiments described herein, the PVD process is performed in a physical vapor deposition (PVD) chamber 300C. It is to be understood that the PVD chamber 300C described herein is an exemplary PVD chamber and other PVD chambers, including PVD chambers from other manufacturers, may be used with or modified to accomplish aspects of the present disclosure. As shown in Figure 3C, a schematic cross-sectional view of the PVD chamber 300C, the PVD chamber 300C includes the process volume 302 defined by the chamber body 301 , the pedestal 304, the stem 306, the opening 308, the sputter gas flow controller 318 disposed between the sputter gas source 314 and the process volume 302, the reactive gas flow controller 320 disposed between the reactive gas source 316 and the process volume 302. In one embodiment, which can be combined with other embodiments described herein, the flow rate of Ar is about 20 seem to about 100 seem and the flow rate of 0 ₂ is about 20 seem to about 100 seem. The target 310 is connected to a target switch 326 that connects the target 310 to the power supply 312, such as a DC power supply, a RF power supply, an AC power supply, a pulsed DC power supply, and a pulsed RF power supply. In Figure 3C, for example, the target 310 is connected to a pulsed DC power supply. At operation 101 , the target 310 is negatively biased via the power supply 312 providing the pulsed DC power. It is to be understood that while the discussion of Figure 1 and Figure 3C references pulsed DC power, operation 101 is contemplated to be performed with other power supplies as mentioned above with the understanding that appropriate adjustments to accommodate the different power supplies may occur. In one embodiment, which can be combined with other embodiments described herein, the pulsed DC power has a frequency of about 100 kHz, a duty cycle of about 50% to about 90%, such as 70%, and a power level of about 1 kW to about 10 kW. In another embodiment, which can be combined with other embodiments described herein, the pulsed DC power is provided for about 100 seconds to about 300 seconds.

[0022] The pedestal 304 is connected to a pedestal switch 330 that when engaged connects the pedestal 304 to a power supply 324, such as a DC power supply, a RF power supply, an AC power supply, a pulsed DC power supply, and a pulsed RF power supply. At operation 103, further described herein, the pedestal 304 is negatively biased via the power supply 324 providing a RF power. It is to be understood that while the discussion of Figure 1 and Figure 3C references RF power, operation 103 is contemplated to be performed with other power supplies as mentioned above with the understanding that appropriate adjustments to accommodate the different power supplies may occur. The PVD chamber 300C operable to independently bias the target 310 and the pedestal 304 allows for operations 101-104 to be performed in the same PVD chamber 300C. A controller 307 is coupled to the PVD chamber 300C and configured to control aspects of the PVD chamber 300C, for example connecting the target switch 326 and connecting the pedestal switch 330, during processing.

[0023] At operation 102, the PVD process is discontinued when the first ceramic layer 202a has a predetermined layer thickness 203. The predetermined layer thickness 203 corresponds to a thickness that is less than a point where large crystalline formations occur. In one embodiment, which can be combined with other embodiments described herein, the first ceramic layer 202a is a Ti0 ₂ layer and the point where large crystalline formation occurs is about 500 A. Therefore, the predetermined layer thickness 203 is less than 500 A, such as about 400 A. The discontinuing of the PVD process stops growth of the ceramic layer. In one embodiment, which can be combined with other embodiments described herein, when the PVD process is discontinued the substrate 201 is removed from the PVD chamber 300A and introduced to a sputter etch chamber 300B, described in further detail herein. In order to inhibit the onset of large crystalline formations, a sputter etch process is performed independent of the PVD process.

[0024] At operation 103, a sputter etch process is performed for a predetermined period of time. In order to inhibit the onset of large crystalline formations, the sputter etch process is performed independent of the PVD process. While the substrate 201 may be biased during the PVD process to form smoother layers, the onset of large crystalline formations would not be inhibited. The sputter etch process is utilizes a plasma of a sputter gas, such as Ar, to bombard the substrate 201 that is negatively biased with argon ions to disrupt the first ceramic layer 202a and break up large crystalline nucleation sites formed on the first ceramic layer 202a. However, large crystalline nucleation sites may not be present as the predetermined layer thickness 203 corresponds to a point where large crystalline nucleation sites may not be present. The predetermined period of time corresponds to a period of time necessary to disrupt the first ceramic layer 202a and to the break up the large crystalline nucleation sites that may have been formed on the first ceramic layer 202a. In one embodiment, which can be combined with other embodiments described herein, the sputter etch process is performed for about 5 seconds (sec) to about 25 seconds for a Ti0 ₂ layer and only a few angstroms of the ceramic layer are removed.

[0025] According one embodiment, which can be combined with other embodiments described herein, the sputter etch process is performed in a sputter etch chamber 300B. It is to be understood that the sputter etch chamber 300B described herein is an exemplary sputter etch chamber and other sputter etch chambers, including sputter etch chambers from other manufacturers, may be used with or modified to accomplish aspects of the present disclosure. As shown in Figure 3B, a schematic cross-sectional view of the sputter etch chamber 300B, the sputter etch chamber 300B includes the process volume 302 defined by the chamber body 301 , the pedestal 304, the stem 306, and the opening 308. The pedestal 304 is connected to a power supply 322, such as a DC power supply, a RF power supply, an AC power supply, a pulsed DC power supply, and a pulsed RF power supply. In one embodiment, which can be combined with other embodiments described herein, the power supply 322 is a RF power supply and the sputter etch chamber 300B incudes a plurality of coils 336 coupled through a matching circuit 332 to a RF power supply 334 . At operation 103, the pedestal 304 is negatively biased via the RF power supply providing a first RF power and a second RF power is provided to the plurality of coils 336.. It is to be understood that while the discussion of Figure 1 and Figure 3B references RF power, operation 103 is contemplated to be performed with other power supplies as mentioned above with the understanding that appropriate adjustments to accommodate the different power supplies may occur. In one embodiment, which can be combined with other embodiments described herein, the first RF power has a first frequency of about 13.56 megahertz (MHz) and a first power of about 50 watt (W) to about 300 W. The second RF power has a second frequency of about 400 megahertz kHz and a second power of about 50 watt (W) to about 300 W. In another embodiment, which can be combined with other embodiments described herein, the first RF power and the second RF power are provided for about 100 seconds to about 300 seconds The sputter gas flow controller 318 disposed between a sputter gas source 314 provides a flow of the sputter gas from the sputter gas source 314 to the process volume 302 at operation 103. In one embodiment, which can be combined with other embodiments described herein, a flow rate of Ar is about 20 seem to about 100 seem. A controller 305 is coupled to the sputter etch chamber 300B and configured to control aspects of the sputter etch chamber 300B during processing.

[0026] At operation 104, the depositing the ceramic layer using the PVD process, discontinuing the PVD process, and the sputter etch process are repeated to form a plurality of ceramic layers 202a, 202b, 202c, 202d, 202e, ..., 202n until amorphous or nano-crystalline ceramic film 200 with a predetermined film thickness 204 dependent on the type of device being formed. In one embodiment, which can be combined with other embodiments described herein, a Ti0 ₂ layer is deposited using the PVD process, the PVD process is discontinued at the predetermined layer thickness of about 400 A, and the sputter etch process is performed for the predetermined period of time of about 15 sec. The depositing the Ti0 ₂ layer using the PVD process, discontinuing the PVD process, and the sputter etch process is repeated 5 times until a Ti0 ₂ film with thickness of about 2400 A is formed.

[0027] In summation, improved methods of forming thick, amorphous or nano crystalline ceramic films are described herein. The utilization of performing the sputter etch process independent of the PVD process inhibits the onset of large crystalline formations by disrupting the ceramic layers and breaking up large crystalline nucleation sites formed on the ceramic layers. Repeating depositing ceramic layers using the PVD process, discontinuing the PVD process, and sputter etching allows thick, amorphous or nano-crystalline ceramic films to form without large crystalline formations. Amorphous or nano-crystalline ceramic films without large crystalline formations may be patterned in order to form accurate shapes with smooth sidewalls and may be tailored to have a high refractive index and low absorption rate for use in optical devices such as waveguides, color filters and two dimensional lenses. [0028] While the foregoing is directed to examples of the present disclosure, other and further examples of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.