Title:
READ CIRCUIT OF MEMORY, AND MEMORY
Document Type and Number:
WIPO Patent Application WO/2020/211468
Kind Code:
A1
Abstract:
A read circuit of a memory, and the memory. The read circuit comprises an amplification unit. A first end of the amplification unit is connected to a first end of a resistive sense memory unit, a second end of the amplification unit is connected to a positive electrode of a power supply, and a second end of the resistive sense memory unit is connected to a negative electrode of the power supply. The amplification unit comprises at least one amplifier. In the read circuit, the resistance of the resistive sense memory unit is different, the amplification factor to the resistive sense memory unit by the amplifier is different; the larger the resistance of the resistive sense memory unit is, the larger the amplification factor to the resistive sense memory unit by the amplifier is; and the smaller the resistance of the resistive sense memory unit is, the smaller the amplification factor to the resistive sense memory unit by the amplifier is. In this way, the difference between the output resistance of the read circuit at the low resistance of the resistive sense memory unit and the output resistance at the high resistance is relatively large, and the subsequent sensitive amplifier can recognize the high resistance and the low resistance without requiring higher sensitivity, thereby reducing the requirements on the sensitive amplifier.
Inventors:
DONG ZIGANG (CN)
XIONG BAOYU (CN)
XIONG BAOYU (CN)
Application Number:
PCT/CN2019/130602
Publication Date:
October 22, 2020
Filing Date:
December 31, 2019
Export Citation:
Assignee:
ZHEJIANG HIKSTOR TECH CO LTD (CN)
International Classes:
G11C13/00
Foreign References:
| CN107545921A | 2018-01-05 | |||
| CN101763887A | 2010-06-30 | |||
| CN101404178A | 2009-04-08 | |||
| CN105304137A | 2016-02-03 | |||
| US20140056054A1 | 2014-02-27 |
Attorney, Agent or Firm:
KANGXIN PARTNERS, P.C. (CN)
Download PDF:
Previous Patent: ELECTRONIC DEVICE, CONTROL METHOD AND DEVICE SYSTEM
Next Patent: AUTOMATICALLY RESETTABLE DEVELOPING CARTRIDGE
Next Patent: AUTOMATICALLY RESETTABLE DEVELOPING CARTRIDGE