Field of the invention

The present invention relates to a detection arrangement comprising an array of at least one superconducting single photon detector (SSPD).

Prior art

American patent publication US-A-6, 812,464 discloses a superconducting single photon detector having a niobium nitride (NbN) superconductor strip operated near its critical current. The strip may be a straight amount of NbN material deposited on a substrate, or may have a meandering pattern. When a photon hits the superconductor strip it is absorbed, and for a very short period the strip is not superconducting. As the strip is current biased, a voltage across the strip occurs which can be measured. To detect the voltage peak, a current biasing circuit is needed, as well as optionally a broadband pre-amplifier (cold amplifier), a broadband amplifier (post-amplifier) and a voltage detection circuit (data acquisition unit).

In the article by K. Smirnov, A. Korneev et al., 'Ultrathin NbN film

superconducting single-photon detector array', Journal of Physics: Conference Series 61 (2007) 1081-1085, an array of SSPD's is disclosed. In the 2x2 array four SSPD's are connected in series. Two possible paths exist and timing of detected pulses received via both paths is measured to determine which of the four SSPD's was actually hit by the photon. Thus using this time-domain multiplexing, spatial detector resolution is provided.

Other types of sensors are also being used in single photon measurements, such as Avalanche Photo Diodes (APD, possibly also in an array) and Charge Coupled Device (CCD) image sensors. However, these types of sensors are unable to provide the performance offered by SSPD's.

Summary of the invention

The present invention seeks to provide an improved detection arrangement for

SSPD's.

According to the present invention, a detection arrangement according to the preamble defined above is provided, wherein the detection arrangement further comprising a cryogenic part with the array of at least one SSPD, the cryogenic part being at a superconducting temperature in operation, and a separate charge storage element in the form of a (single) electronic component connected to an output terminal of each of the at least one SSPD, the separate charge storage element being arranged on the cryogenic part. The term 'at a superconducting temperature in operation' is to be understood as a temperature below the critical temperature of the superconducting material of the SSPD. The changing characteristic of the SSPD when a photon hits the SSPD diverts a bias current to the charge storage element, which can be measured as a voltage over the charge storage element, e.g. in the form of a (single) electronic component such as a capacitor. The charge storage element in the present invention embodiments has a specific technical function, i.e. storing an electrical charge, which is different from other possible uses of a capacitor when used in input or output circuitry, e.g. a DC blocking function, filter function or bias-T function.

In a further embodiment, the output signal paths of each of the at least one SSPD are connected to a multiplexer. The multiplexer may be arranged on the cryogenic part. Using a multiplexer allows to use the array of at least one SSPD effectively, and to provide an accurate measurement signal to further processing units.

The array comprises a two dimensional array of SSPD's in a further embodiment, the detection arrangement further comprising further processing elements which are arranged to integrate the SSPD output signals. This allows e.g. to have a detection surface which is a multiple of the detection surface of a single SSPD, or to process the measurement signal obtained to obtain a space resolved photon detection.

In a further embodiment, the array comprises a two dimensional array of SSPD's, the detection arrangement further comprising further processing elements which are arranged to process the SSPD output signals sequentially. This arrangement allows further applications of the detection arrangement, e.g. for imaging purposes.

An output signal path of each of the at least one SSPD's comprises a first amplifier which is arranged on the cryogenic part. This allows to obtain a pre-amplified signal from the cryogenic part of the detection arrangement, allowing more accurate and robust further processing of the measurement signals. In one embodiment, the first amplifier comprises an integrator and amplifier circuit with an operational amplifier (OpAmp). Such an OpAmp can provide a large gain (in the order of 100V/V) which enhances the small signal obtained from the combination of SSPD and charge storage element. In a further embodiment, the first amplifier comprises an integrator and amplifier circuit with a field effect transistor (FET). Such a FET can be easily integrated on the cryogenic part, and can operate at cryogenic temperatures (e.g.

especially when using GaAs FET's), while still providing a sufficient gain and integration accuracy.

In an even further embodiment, the detection arrangement further comprises a second amplifier which is arranged outside the cryogenic part. This allows to use readily available amplifier circuits for the purpose of amplifying the measurement signal in a normal environment operating temperature range (e.g. room temperature).

The charge storage element is in a further embodiment a capacitor having a capacitance value in the range of 0.1...1 OOnF . Especially when using a ceramic capacitor, proper operation at cryogenic temperature can be achieved.

In a further aspect, the present invention relates to a method of detecting photons using a detection arrangement according to the present invention embodiments, the method comprising detecting a charge on at least two charge storage elements using a multiplexer to connect the at least two charge storage elements with further processing units. Furthermore, the method may further comprise integrating signals of each of the at least one SSPD. As an alternative, the method may further comprise sequentially scanning the array of the at least one SSPD's to obtain a sensor image. Short description of drawings

The present invention will be discussed in more detail below, using a number of exemplary embodiments, with reference to the attached drawings, in which

Fig. 1 shows a schematic diagram of an embodiment of the sensor part of a detection arrangement according to the present invention;

Fig. 2 shows a schematic diagram of a further embodiment of the present detection arrangement;

Fig. 3 shows a schematic view of an array of SSPD's as used in a further embodiment of the present detection arrangement;

Fig. 4 shows a schematic diagram of a further embodiment of the present invention using an integrator;

Fig. 5 shows a schematic diagram of an even further embodiments of the present invention using a FET amplifier; Fig. 6a shows a graph representing a measured voltage as function of time at the output of the detection arrangement; and

Fig. 6b shows a graph representing the events of photons hitting the detector as function of time, resulting in the measurement of Fig. 6a.

Detailed description of exemplary embodiments

The present application relates to a detection arrangement which may be used for (single) photon detection, e.g. in fast imaging with superconducting detectors. Niobium nitride (NbN) is a known superconductor material used to provide superconducting single-photon detectors (SSPD) 1. Alternative materials include, but are not limited to Niobium Titanium nitride (NbTiN), Aluminium (Al), Molybdenum Rhenium (MoRe) and Magnesium boride (MgB2). As shown in the embodiment of Fig. 1, a strip 2 of NbN is used which is connected to metal contacts 3 (e.g. Au). The strip 2 may have various forms, e.g. a straight line, a circular pattern or a meandering pattern as shown in the embo diment o f Fig . 1.

The SSPD 1 is current biased using a current source 4. In general the current I is chosen to ensure the SSPD 1 remains in superconducting state while being cooled to superconducting temperatures (e.g. using liquid Helium at about 4K). As a result of the cooling to a superconducting temperature, i.e. a temperature below the critical temperature of the superconductor, no voltage is present over the SSPD 1 despite the current flowing. Once a photon hits the NbN strip 2, this changes however, and the superconducting state is temporarily left, resulting in a voltage across the SSPD 1 that can be measured.

In the embodiments of the detection arrangement according to the present invention, this voltage is not directly measured. As a photon hits the SSPD1, the current from the current source 4 is redirected towards a charge storage element 5. In the embodiment of Fig. 1, the charge storage element 5 is a capacitor connected to an output terminal 3 of the SSPD 1, in this embodiment via a resistor 12. The other terminal of the capacitor 5 is connected to ground, similar as the SSPD 1. A voltage across the SSPD 1 created by a photon hitting the SSPD 1 is thus stored as a charge on the capacitor 5. A pre-amp lifier 6 may be used to amplify a signal obtainable from the charged capacitor 5, and measured using e.g. a voltage detector 7. To operate efficiently, the capacitance value of the capacitor 5 is chosen between 0.1 and 100 nF, e.g. 1 nF. Special types of capacitors 5 may be used, which allow proper operation in cryogenic temperatures, such as ceramic capacitors 5.

During the very short period the current is diverted to flow to capacitor 5, a small charge is stored, resulting in a stepwise voltage increase over the capacitor 5. When the SSPD 1 is back in superconducting state, the separate capacitor 5 will start to discharge, with a time constant (RC) determined by the values of the resistor 12 and capacitor 5, but also by the impedance of the pre-amplifier 6.

The value of the resistor 12 and separate capacitor 5 in combination with the current provided by the current source 4 (and the characteristics of the SSPD 1), determine the step voltage that can be measured for each photon hitting the SSPD 1.

In further embodiments, the pre-amplifier 6 may be an OpAmp based amplifier (as shown), or alternatively, a field effect transistor (FET) may be used (see the embodiments described hereafter with reference to Fig. 4 and 5)..

In US-A-6, 812,464, a detection arrangement using a SSPD is disclosed. It is noted that the arrangement comprises a bias-T circuit connected to a current source, in order to provide the bias current to the SSPD and an output port for the pre-amplifier. The bias-T circuit shown comprises a simple LC circuit. The capacitor used in this LC circuit is differently arranged and functions differently (used for DC blocking) from the capacitor 5 as used in the present invention embodiments as charge storage element.

In Fig. 2, a further embodiment of the present detection arrangement is shown schematically. Here an array of at least one SSPD 1 is used on a cryogenic part 9 which is held at superconducting temperature during operation of the detection arrangement. A separate capacitor 5 is connected to an output terminal 3 of each of the SSPD's 1 (via resistor 12). The separate capacitors 5 are also positioned on the cryogenic part 9.

Furthermore, optionally, pre-amplifiers (or first amplifiers) 6 are provided on the cryogenic part 9 as well.

The signals from the SSPD's 1 (or the at least two capacitors 5) are combined using a multiplexer 8 by connecting the output signal paths of each of the at least one SSPD 1 to the multiplexer 8. This multiplexer 8 may also be positioned on the cryogenic part, having the advantage that only a single output lead is necessary to transfer the multiplexed output signal to an amplifier 10 outside of the cryogenic part 9.

Alternatively, the multiplexer 8 is also positioned outside the cryogenic part 9. Although this requires more leads to extend from the cryogenic part 9, it lowers the number of components on the cryogenic part 9, which in return allows more efficient cooling of the cryogenic part 9.

The signal output by the amplifier 10 may then be further processed using a processor 11. The amplifier 10 and processor 11 may be regarded as further processing units which are arranged to execute signal processing of the output signal of the multiplexer 8.

The multiplexer 8 has a limited speed, determined by its internal structure. This may impose a minimum discharge time for the detection arrangement, which can be set by choosing the values of capacitor 5 and resistor 12. In an example, the capacitor 5 value is InF and the resistor 12 value is 1 ΙίΩ.

The processor 11 is adapted to process signals received from the amplifier 10. These signals may be analogue signals, which are further processed as analogue signals, or which are converted in digital signals and then processed digitally. The processor 11 may comprise additional units for that purpose, and even may be a general purpose computer system, with peripherals for user control, program and data storage, and display of processed results. As an alternative the processor 11 may be a dedicated (digital) signal processor specifically arranged for a specific type of signal (data) processing.

The detection arrangement as described above allows to process signals from a multitude of SSPD's 1, without requiring separate amplifiers 10 for each SSPD 1.

Especially in the case of large arrays of SSPD's this lower number of electrical units is a large benefit.

In Fig.3, an embodiment is shown, in which a two dimensional array of m x n SSPD's 1 (m>l and n>l) is positioned on a sensor holder 15.

In a first embodiment this allows to increase the effective sensor surface of the detection arrangement. Regular SSPD's 1 based on a strip of superconducting material (such as NbN mentioned above) have an effective surface of only 10 x 10 μιη. Using an array of m x n SSPD's 1 it is possible to increase the effective surface of the detection arrangement. The chance that a single photon hits one of the m x n SSPD's is much larger than for a single SSPD 1.

The output signals of the SSPD's 1 may be further processed using further processing units 8, 10, 11, similar as in the embodiment described with reference to Fig. 2. The multiplexer 8 is arranged to scan the SSPD's 1 consecutively during a readout window. The readout window (depending on the allowable error by the RC- discharge of resistor 12 and capacitor 5) is chosen to allow sufficient time for the processor 11 to perform a readout cycle. By scanning the SSPD's 1 quickly enough, a sufficient time resolution may still be obtained.

In a further embodiment, the array of m x n SSPD's is used for imaging purposes, or spatially resolved photon detection. This allows to detect where single photon's hit the detection arrangement. For this, the multiplexer 8 sequentially scans the capacitors 5 associated with each of the SSPD's, after which the signal is amplified by external amplifier 10 and further processed by processor 11, e.g. to form an image. The time between two successive scans of a single SSPD 1 may determine the time resolution of a sequence of images. As the charge on the capacitor 5 is proportional to the number of photons that have hit the SSPD 1 since the last scan, it is also possible to resolve the number of photons that have hit a single SSPD 1 and include that in the processed data (photon number resolution).

The read-out scheme as discussed above relating to the various embodiments also allows to switch the SSPD's 1 on and off at very high speeds which enable very short exposure times (much less than 1 ns). This allows gated imaging with a very high time resolution.

Using one of the embodiments of the detection arrangement as described above, the following device characteristics may be obtained:

sensitive from UV to infrared;

sensitive down to the single photon level;

dead time of 1 SSPD: 10 ns-> 100 MHz counting rate possible; (Note: with smaller SSPD's 1 dead times down to 1 ns are possible)

- Timing accuracy (or timing jitter): 65 ps;

In further embodiments, the detection arrangement (specifically processor 11, but in co-operation with the other elements) is arranged to accumulate photon pulses detected by the one or more SSPD's 1, and to read out a DC voltage after an integration window having a predetermined time period T, e.g. T= 100 μβ. From the measured DC voltage, the actual number of photons that have hit the SSPD 1 can be determined using the processor 11 (V measured = (number of photons) x (voltage step resulting from one photon). In order to be able to integrate a number of photon hits over time, the RC time should also be large enough to enable determination of the number of photons over the integration window. Exemplary values of the resistor 12 is e.g. lkD and of the capacitor 5 e.g. lnF.

One further embodiment of a detection arrangement according to the present invention is shown schematically in Fig. 4. Here, the resistor 12 is connected to an inverting gate of an operational amplifier (OpAmp) 16, and the separate capacitor 5 is connected between the inverting gate and an output gate of OpAmp 16. The non- inverting gate of the OpAmp 16 is connected to ground. Furthermore, in this embodiment, a switch 17 is connected in parallel to the separate capacitor 5, which may function to reset the detection arrangement (by setting the charge over the capacitor 5 to zero by short circuiting the capacitor 5). As in the embodiment of Fig. 4 the capacitor 5 is not connected to ground (as in the embodiment shown in Fig. 1) the capacitor 5 will not lose its charge directly.

In Fig. 6a, the resulting output voltage as can be measured using voltage detector 7 is shown (actually shown are simulations of a representative circuit), when submitting the SSPD 1 to a series of photon impacts as shown in the graph of Fig. 6b. As the OpAmp 16 in the embodiment of Fig. 4 is connected as an inverting

amplifier/integrator, the measured voltage is negative in Fig. 6a. It can be seen that due to a photon hitting the SSPD 1, a voltage is being built up over the separate capacitor 5 very quickly. The OpAmp 16 configuration as shown results in a large gain (100V/V) resulting in voltage step which can be resolved (60 μν/photon). When the resistor 12 and capacitor 5 values are properly chosen (e.g. 1 kD and 100 pF)it is possible to use a wide measurement window of e.g. ΙΟμβ. At the end of such a measurement window, the number of photons detected can be determined with sufficient accuracy, in a readout window. The maximum length of the readout window is determined by the allowable readout error caused by discharge of the capacitor 5 (imposing that the RC- time selected for capacitor 5 and resistor 12 should be much larger than the readout window). In one embodiment, the charge on the capacitor 5 is allowed to flow away in an RC-discharge window following the readout window. This would impose that the RC-discharge window should be chosen as longer than the length of the RC-time constant.

In a further embodiment, the processor 11 can be arranged to reset the capacitor 5 at the start of a window using switch 17, which can be effected in an active discharge window following the readout window. This allows to start with a new measurement window faster than in the case of discharge using RC-discharge.

The total amount of time of measurement window, readout window, and (RC or active) discharge window, is the total cycle time which can be obtained using these embodiments.

In Fig. 5, a practical implementation is shown using a FET 18 as amplifying and integrating circuit. The capacitor 5 is connected between the gate and drain of the FET 18, and the source of the FET 18 is connected to ground. The FET 18 is biased using a DC bias source 19 to set a proper operational point. In an alternative embodiment, the source of the FET 18 is connected to ground using a parallel circuit of a further resistor (low value) and further capacitor (high value), in order to improve the signal behaviour of the detection arrangement.

Using a FET 18 in an amplifier/integrator circuit arrangement with separate capacitor 5 has the advantage that such an element is better suited for positioning on the cryogenic part 9 of the detection arrangement, without performance degradation or unpredictable operation at low temperatures. This is especially the case for FET's 18 of the GaAs type.

Due to the operational setting point of the FET 18 in the arrangement of Fig. 5, the output voltage measured using voltage detector 7 has a large (negative) DC component. When considering that the detection arrangement is operating using a time window which is relatively short (in the order of 100 μβ) this DC component may be removed using a high pass filter. This allows to measure the voltage change caused by the impinging photons only and with a higher accuracy. As an alternative to remove the DC component, the voltage may be measured at the start and the end of the integration window, and the difference between the two values can be further processed. This can be implemented as an auto zero adjustment using the processor 11.

Applications of any one of the embodiments described above with reference to the drawings is broad, and includes but is not limited to: photon number resolution, quantum cryptography, quantum computing, medical imaging, astrophysics imaging, etc.