A common primary electrical power found in aircraft is either +28 volt DC (VDC) or three phase 115 volt AC (VAC), which is rectified and filtered to approximately 270 VDC. Many types of equipment have been designed to operate from either of these power sources.

Relatively small high power converters for changing the 115 VAC into +28 VDC have been known for some time.

However, there has been a lack of small, efficient converters for changing +28 VDC into +270 VDC.

Boost converters have been used for some time to convert a low DC voltage into a higher DC voltage. A common boost converter includes an inductor, a diode, an output capacitor, and a power switching device. These converters for producing a voltage higher than the voltage of the primary source are sometimes referred to as "step-up" converters.

A common, known boost converter, or step up voltage converter, is shown in Figure 1. Operation of the illustrated boost converter is well understood in the art. An input terminal 11 receives the input DC voltage (Vj) An input capacitor 13 is connected between the input terminal 11 and ground. An inductor 21 having inductance L1 is connected to the input terminal 11. A switch, such as a Field Effect Transistor (FET) 41, is connected between the "output" side of the inductor 21 and a second terminal, such as ground. The switching element 41 is controlled by a regulator control 31. The regulator control 31 governs the time the switch is on (conductive) or off (nonconductive). A rectifying diode 61 couples the output side of the inductor 21 to the

converter output terminal 81. The converter output voltage Vout is produced on the converter output terminal 81. An output filter capacitor 91 is connected between the output terminal and ground.

When the FET 41 is conductive, energy from the input terminal 11 charges the inductor 21. When the FET 41 is not conductive, that energy is discharged through the diode 61 to charge the output capacitor 91. The regulator control 31 governs the ratio of the time the FET is conductive (on) and nonconductive (off) so that the output voltage Vout on the converter output terminal 81 remains constant. The regulator control adjusts the on/off cycle of the switch 41 by monitoring the voltage on the converter output terminal 81 through a feedback line 35.

The voltage rating of the switching transistor 41 is determined by the peak voltage that will appear across the transistor when the regulator control 31 turns the transistor off, as the inductor 21 flies up to the output voltage, plus whatever overshoot may be present due to unwanted parasitic elements. With allowance for some derating for safe applications, a boost converter with an output voltage Vout of 270 VDC requires a switching FET capable of carrying a voltage of at least 400 volts across its drain and source (a VDS rating of at least 400 volts).

SUMMARY OF THE INVENTION The present invention is a DC power converter for converting an input voltage to a final output voltage that is higher than the input voltage. The power converter includes an input terminal for receiving the input voltage and a final output terminal. A boost converter generates an intermediate voltage that is higher than the input voltage and lower than the final output voltage, wherein the boost converter includes an inductor having a primary winding. The power converter

additionally includes a secondary winding on the inductor for increasing the intermediate voltage to the voltage higher than the intermediate voltage.

More specifically, the invention is a step-up DC to DC converter that includes an input terminal for receiving an input DC voltage and a converter output terminal. The step up converter of the invention further includes a boost converter comprising an inductor having a first winding having a first end connected to the input terminal, a switch for selectively connecting the second end of the first winding to ground, a first diode connected between the second end of the first winding and an intermediate node, and a first output capacitor connected between the intermediate node and ground. The boost converter produces at the first output capacitor an intermediate voltage higher than the input voltage. The step up converter of the invention further includes a second winding on the inductor, a first end of which is connected to receive the intermediate voltage. A diode is connected between the second end of the second winding and the converter output terminal. A second output capacitor is connected between the converter output terminal and ground.

An object of the invention is to provide an electrical converter for producing a voltage several times higher than the input voltage.

It is another object of the invention to provide an electrical converter that uses relatively small inexpensive components to produce a high voltage.

It is another object of the invention to provide an electrical converter that produces a high output voltage, while applying only a portion of that output voltage across its switching transistor.

It is another object of the invention to provide an electrical converter that produces a high voltage at high efficiency.

It is another object of the invention to provide an electrical converter that produces a high voltage while dissipating relatively little power.

It is another object of the invention to provide a step up electrical converter that steps up the voltage in multiple stages using a single switch and a single control.

It is another object of the invention to provide a step up electrical converter including a mechanism to control the rate of voltage change across the switch.

BRIEF DESCRIPTION OF THE DRAWING Figure 1 is a schematic diagram of a boost converter of a known type.

Figure 2 is a schematic diagram of one embodiment of the reboost converter of the invention.

Figure 3 is a schematic diagram of another embodiment of the reboost converter of the invention.

DETAILED DESCRIPTION One embodiment of a "reboost converter" constructed in accordance with the invention is shown schematically in Figure 2. The reboost converter includes a primary input terminal 111 for receiving a primary input voltage V. . The reboost converter produces a final output voltage Vout at a final output terminal. The final output <BR> <BR> <BR> voltage Vout is higher than the primary input voltage V. <BR> <BR> <BR> <P> in The reboost converter shown in Figure 2 includes a boost converter subsystem. The boost converter subsystem includes a subsystem input terminal connected to the primary input terminal for receiving the input voltage V. . The boost converter subsystem produces at an intermediate or subsystem output terminal 151 an intermediate voltage. The intermediate voltage is higher than the primary input voltage Vjn/ but less than the final output voltage Vout The remainder of the voltage step up is provided by one or more secondary stages, each

of which includes a secondary winding 122 on the inductor.

The boost converter subsystem comprises a first winding 121 of an inductor having its input side connected to the primary and subsystem input terminal 111. The first winding has inductance Llp. A switch, such as a FET 141, is connected between the output side of the inductor winding 121 and a second terminal, which is typically connected to ground. In the illustrated embodiment, the switch is a FET with its drain connected to the output side of the inductor, and its source connected to ground. A first rectifying diode 161 is connected between the output side of the inductor and the boost subsystem output terminal 151. Finally, a first filter capacitor 191 connects the boost subsystem output terminal to the second terminal (ground) to aid in maintaining a constant intermediate voltage at the boost system output terminal.

In accordance with the invention, a second stage provides voltage step up from the intermediate voltage produced by the boost converter subsystem to a voltage higher than the intermediate voltage. The second stage may be considered to have a second stage input terminal coincident with the output terminal 151 of the boost converter subsystem. The second stage includes a second stage output terminal. In the illustrated embodiment of Figure 2, the second stage output terminal is the system output terminal 181, and the output of the second stage is the final converter output voltage Vout The second stage includes a second winding 122 applied to the inductor. The "input" side of the second winding 122 is connected to the intermediate or boost subsystem output terminal 151. The second winding 122 is connected in phase with the first winding 121 such that the "input" side of the second winding is connected to the DC output voltage from the boost converter subsystem.

A second rectifying diode 162 is connected to the "output" side of the second winding 122. The anode of the second diode is connected to the second winding. The cathode of the second rectifier diode is connected to the output terminal of the second stage.

A "snubber" capacitor 155 is connected between the "output" side of the second winding 122 and ground. As will be described below, the snubbing action of the snubber capacitor controls the rate at which the voltage at the drain of the switch 141 slews.

A second filter capacitor 192 is connected between the second stage output terminal and ground. The second filter capacitor 192 helps to keep the system output voltage constant.

The first and second windings 121, 122 are connected in a series aiding fashion, so that the final output voltage Vout is the composite of the voltages produced on the two windings and the input voltage.

When the switch 141 is on, current flows through the first winding 121 of the inductor, and a magnetic field builds up in the inductor core. The polarities of both the first and second windings are such that the two rectifier diodes 161, 162 are reverse biased. While the FET switch 141 is conducting, the voltage across the snubber capacitor 155 is equal to one half the output voltage Vout minus the primary input voltage Vi,, assuming that the primary and secondary windings have the same number of turns. In the exemplary embodiment, the primary input voltage Vn is +28 VDC, and the system output voltage Vout at the system output terminal is +270 VDC. The voltage across the snubber capacitor 155 is (270 - 28)/2 = 121 volts.

When the FET 141 is turned off, so that the switch is open or nonconductive, the current flowing through the first winding 121 of the inductor rapidly reverses direction. The collapse of the magnetic field in the inductor core will drive the anodes of the rectifier

diodes 161, 162 positive. The regulator control 131 adjusts the duty cycle for the FET gate drive as required so that the voltage at the system output terminal remains a constant 270 VDC.

The regulator control 131 includes a precision resistive divider with a ratio of 54:1 in this illustrative embodiment, which reduces the output voltage to a 5.0 volt sample. This sample is compared against a precision 5.0 volt reference. The resultant error voltage, when compared against a sawtooth waveform, produces a pulse width modulated signal. The output voltage is equal to the input voltage divided by the quantity of one minus the duty cycle [V0 = V1/(1-D)]. The regulator control 131 will alter the duty cycle, as required, to maintain a constant output voltage. This process is well understood by those skilled in the art.

If the number of turns in each winding 121, 122 on the inductor of the converter system are the same, the voltage difference between the system output voltage Vout and the primary input voltage Vn is evenly divided between the windings. In the illustrated embodiment having two windings, half the voltage difference appears across the first winding 121, and half the voltage difference appears across the second winding 122. In the illustrated embodiment having a primary input voltage Vjn of +28 VDC and a system output voltage V out of +270 VDC, the voltage difference is 242 volts. One half of that voltage difference is across each winding. In this embodiment, 121 volts appears across each winding.

When the switch 141 is opened, the drain of the FET switch rises to the primary input voltage plus one half the difference between the system output voltage and the primary input voltage, which is ((Vout - Vim)/2) + van.

<BR> <BR> Using the values for V out and V. above, the drain of the<BR> in FET rises to ((270 - 28)/2) + 28 = 149 volts. Thus, the "input" end of the secondary winding of the inductor is "anchored" at 149 VDC, the system output voltage will be

that voltage plus the voltage across the second winding.

Thus, the system output voltage will be 149 +121 = 270 VDC.

The slew rate of the FET drain will be limited by the snubbing action of the snubber capacitor 155. The voltage across the snubber capacitor is driven from 121 volts to 270 volts while the drain of the FET is rising from 0 volts to 149 volts. At the time at which the FET is turned off, a typical current peak is 15 amp. The current through the first winding 121 of the inductor divides between the parasitic capacitance in the FET (Coss) and the capacitance of the snubber capacitor. The parasitic capacitance Coss of the FET 141 may be, for example, 1090 pF. The capacitance of the snubber capacitor 155 may be 1000 pF. The current will divide accordingly, and the transition time will be approximately 20 nanoseconds (nS).

The maximum voltage that is applied across the switch 141 is one half the voltage across the switch 41 of the boost converter shown in Figure 1. Therefore, a 200 volt rated part for the FET 141 of the converter shown in Figure 2 would be sufficient. The entire converter is controlled by only one regulator control 131.

As noted above, the FET used as the switch in the boost converter of Figure 1 should be rated to at least 400 volts for a boost converter that generates 270 VDC.

A typical FET of such a rating has a die size of approximately 0.27 in by 0.416 in, and, when on, has a forward resistance between the source and drain of 0.16 ohms (RDS(ON))- In contrast, a FET with equal die size and rated to withstand 200 volts across the source and drain has a resistance of approximately 0.045 ohms. For a power converter with a primary input voltage of +28 VDC that generates a final output voltage of +270 volts, running at 125 watts of output power, the power dissipation in the switching FET caused by the "on"

2 resistance will be the I R product. If the RMS current into the switch is 7.3 amps (typical for such a converter), the FET forward conduction losses will be 8.6 watts with a 400 volt switch. However, with a 200 volt switch, the forward conduction losses are only 2.4 watts.

A well designed converter operating in the above power range may be expected to have total losses, excluding the FET forward conduction losses, of approximately 6.5 watts. Since the FET forward conduction losses are the largest single contributor to total system losses, reducing the FET forward conduction losses significantly reduces total system losses.

In a boost converter such as shown in Figure 1 incorporating a FET rated at 400 volts, the total losses will be 8.6 + 6.5 = 15.1 watts. If the converter is operating at an output power of 125 watts, then the overall efficiency is 89.2%. Using the converter of the invention with a switch rated at 200 volts, the total losses will be 2.4 + 6.5 = 9.9 watts. Thus, for a converter operating at an output power of 125 watts, the overall efficiency is 92.7%. Total losses are decreased by 34%. This improvement is further enhanced when the power converter is operating at a low line input condition when the RMS current increases and conduction losses rise by the square of that increase.

In some applications a higher output voltage Vout is required. The ratio of the number of turns in the first and second windings 121, 122 of the inductor may be adjusted so that the second winding 122 (second stage of the converter system) produces more voltage while continuing to limit the voltage across the switch 141.

Another embodiment of the reboost converter for developing higher system output voltages is shown in Figure 3. In this embodiment, additional secondary windings are added to the inductor. A recitifying diode and a filter capacitor are added with each additional secondary winding. This embodiment includes a first

stage boost converter having an input capacitor 213 and a first winding 221 on an inductor. A FET switch 241 is connected to the output side of the first winding 221.

A regulator control 231 is connected to the gate of the FET 241 to control the FET. A first rectifier 261 connects the first winding of the inductor to a first stage output point 251. A first stage output capacitor 291 connects the first stage output point to ground. The first stage boost converter produces a first intermediate voltage at the first stage output point 251.

The second stage includes a second winding 222, a second rectifier 262, and a second filter capacitor 292.

The input side of the second winding 222 is connected to the output point 251 of the first stage. The second rectifier 262 connects the output side of the second winding 222 with a second stage output point 252. A snubber capacitor 255 connects the output side of the second winding 222 and ground. A second intermediate voltage is produced at the second stage output point 252.

The second intermediate voltage is higher than the first intermediate voltage.

The third stage includes a third winding 223 on the same inductor core, a third rectifier 263, and a third filter capacitor 293. The input side of the third winding 223 is connected to the output point 252 of the second stage. A third intermediate voltage, higher than the second intermediate voltage, is produced at the third stage output point 253.

The fourth stage includes a fourth winding 224 on the same inductor core, a fourth rectifier 264, and a fourth output filter capacitor 294. The input side of the fourth winding 224 is connected to the output point 253 of the third stage. The final converter output voltage Vout is produced on the converter output terminal 281.

The embodiment shown in Figure 3 will operate as the embodiment shown in Figure 2, except that the formulas

are changed to reflect the additional windings on the inductor. In addition, ratios are changed if the number of turns on the windings differ. The inductor should be designed to minimize inter-layer parasitic capacitances.

Single layer solenoid construction is recommended, with all secondary windings having the same number of turns.

As can be seen, the windings are connected in a series aiding arrangement. The voltage output at each stage becomes the input voltage for the next stage, and the final output voltage V out is the composite of the voltages of all the windings. Only one regulator control and one switch are used.

Referring to the example shown in Figure 3, a primary winding is part of a boost converter. Three secondary windings are shown. If the first winding and all the secondary windings have the same number of turns, one quarter the difference between the system output voltage Vout and the primary input voltage Vn will be produced in each winding. While the FET is conducting, all four of the rectifiers are reverse biased. Thus, while the FET is conducting, the voltage across the snubber capacitor is equal to one quarter the difference between the final output voltage and the primary input voltage.

When the FET is turned off, the voltage applied to the anodes of all four rectifiers will become positive.

Again assuming the number of turns on each of the four windings is the same, the voltage across each winding will be the same. Each winding has a voltage of (VOUt - Vjn)/4. The drain of the FET will rise to (VOUt - Van)/4 + V-.

Those skilled in the art will recognize that other modifications can be made to the power converter embodiments described above without departing from the spirit of the invention. Therefore, the above embodiments are to be considered exemplary, and not limiting.