Title:
RECEIVER
Document Type and Number:
WIPO Patent Application WO/2017/056855
Kind Code:
A1
Abstract:
This receiver is provided with: an A/D converter (12) which performs analog-digital conversion of an input signal; an equalizer (13) which equalizes the output from the A/D converter, removes intersymbol interference and outputs data; a timing recovery portion (14) which uses the data output from the equalizer to generate a recovery clock; a detecting unit (15) which detects the time at which an input signal has changed from a no-signal state and has reached a pre-determined threshold; and an initial phase setting unit (16) which sets as the initial phase of the recovery clock obtained by the timing recovery portion a time after a prescribed time period has elapsed after the time detected by the detecting unit.
Inventors:
MATSUDAIRA NOBUAKI (JP)
Application Number:
PCT/JP2016/075926
Publication Date:
April 06, 2017
Filing Date:
September 05, 2016
Export Citation:
Assignee:
DENSO CORP (JP)
International Classes:
H04L7/10; H03L7/00; H04B1/10; H04L7/033; H04L25/03; H04B3/06
Foreign References:
| JPS6442949A | 1989-02-15 | |||
| JPH04274634A | 1992-09-30 | |||
| JP2004235858A | 2004-08-19 | |||
| JPH0918525A | 1997-01-17 |
Attorney, Agent or Firm:
JIN Shunji (JP)
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