Title:
RECEIVING CIRCUIT
Document Type and Number:
WIPO Patent Application WO/1996/017441
Kind Code:
A1
Abstract:
A receiving circuit for digital demodulation communication system including channels, which reduces the power consumption of the receiving system, has a simple structure and consumes a small power. Two frequencies higher and lower the middle value of the frequencies of the channels are supplied to first and second frequency converting circuit (2 and 3) respectively from a local frequencyt signal generating circuit (4). Two output signals are generated for each of three signals of desired wave, higher channel, and lower channel. The desired wave commonly existing in the circuits (2 and 3) are extracted by means of a common wave extracting circuit (5). The frequency offset 'omega'o in the output of the circuit (5) is removed by means of a frequency offset circuit (6) and the unnecessary frequency components are removed through a filter (8). By using a commons wave extracting circuit (5) having a transformer to utilize the mutual inductance, the difference between the common and noncommon waves is twice larger than that of conventional.
Inventors:
OHTA GEN-ICHIRO (JP)
INOKAI KAZUNORI (JP)
SASAKI FUJIO (JP)
INOKAI KAZUNORI (JP)
SASAKI FUJIO (JP)
Application Number:
PCT/JP1995/002448
Publication Date:
June 06, 1996
Filing Date:
November 30, 1995
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD (JP)
OHTA GEN ICHIRO (JP)
INOKAI KAZUNORI (JP)
SASAKI FUJIO (JP)
OHTA GEN ICHIRO (JP)
INOKAI KAZUNORI (JP)
SASAKI FUJIO (JP)
International Classes:
H03D1/22; H04B1/26; H04B5/00; H03D7/16; H04B1/12; (IPC1-7): H04B1/26
Foreign References:
| JPS6472626A | 1989-03-17 | |||
| JPS5757007A | 1982-04-06 | |||
| JPH01226220A | 1989-09-08 |
Other References:
See also references of EP 0742647A4
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