Title:
RECEIVING DEVICE AND DATA PROCESSING METHOD
Document Type and Number:
WIPO Patent Application WO/2017/026248
Kind Code:
A1
Abstract:
This technology relates to a receiving device and a data processing method which enable more appropriate clock synchronization.
A receiving device receives an IP transmission system digital broadcast signal including time information comprising a second field and a nanosecond field, and a stream of a content, generates a processing clock synchronized with the time information on the basis of the time information included in the digital broadcast signal, and processes the stream included in the digital broadcast signal on the basis of the processing clock. This technology is applicable, for example, to a television receiver conforming to an IP transmission system.
Inventors:
TAKAHASHI KAZUYUKI (JP)
MICHAEL LACHLAN BRUCE (JP)
HIRAYAMA YUICHI (JP)
OKADA SATOSHI (JP)
MICHAEL LACHLAN BRUCE (JP)
HIRAYAMA YUICHI (JP)
OKADA SATOSHI (JP)
Application Number:
PCT/JP2016/071566
Publication Date:
February 16, 2017
Filing Date:
July 22, 2016
Export Citation:
Assignee:
SONY CORP (JP)
International Classes:
H04N21/43; H04H60/40; H04L7/00; H04N21/434
Domestic Patent References:
| WO2015068352A1 | 2015-05-14 | |||
| WO2014188960A1 | 2014-11-27 |
Foreign References:
| JP2011518509A | 2011-06-23 |
Other References:
EXEL, REINHARD: "Mitigation of Asymmetric Link Delays in IEEE 1588 Clock Synchronization Systems", IEEE COMMUNICATIONS LETTERS, vol. 18, no. 3, March 2014 (2014-03-01), pages 507 - 510, XP011544857, ISSN: 1089-7798
Attorney, Agent or Firm:
NISHIKAWA Takashi et al. (JP)
Download PDF:
Previous Patent: CAPACITOR AND METHOD FOR PRODUCING SAME
Next Patent: RECEPTION DEVICE AND DATA PROCESSING METHOD
Next Patent: RECEPTION DEVICE AND DATA PROCESSING METHOD