Title:
RECEPTION CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2021/145109
Kind Code:
A1
Abstract:
[Problem] To provide a reception circuit that suppresses the skew of the waveform of a signal to enable high-speed data communication. [Solution] This reception circuit is provided with: a first differential stage that receives a first input signal and a second input signal by a first input unit and a second input unit, respectively, and passes first and second currents corresponding to the first and second input signals, respectively; a second differential stage having a first current path that generates and outputs a first amplification signal corresponding to the first current, and a second current path that generates and outputs a second amplification signal corresponding to the second current; a power supply line that supplies electric power to the first and second differential stages; and at least one variable resistance unit provided in the first or second current path.
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Inventors:
NAKAO HIROSHI (JP)
YANASE NAOTO (JP)
YANASE NAOTO (JP)
Application Number:
PCT/JP2020/045981
Publication Date:
July 22, 2021
Filing Date:
December 10, 2020
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H04L25/02; H03F1/22; H03F3/34; H03F3/45; H03K19/0175
Foreign References:
| JP2015012479A | 2015-01-19 | |||
| JP2011044795A | 2011-03-03 | |||
| JP2017038212A | 2017-02-16 | |||
| US20140036982A1 | 2014-02-06 |
Attorney, Agent or Firm:
NAKAMURA Yukitaka et al. (JP)
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