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Patent Searching and Data


Title:
RECONFIGURATION CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2019/049980
Kind Code:
A1
Abstract:
In order to achieve both high-density implementation of applications in the form a reconfiguration circuit without a redundancy bit and the capability to continuously run applications with redundancy, the present invention is a reconfiguration circuit provided with: a first lookup table composed of a crossbar memory formed in a crossbar switching circuit having a plurality of switch cells including a complementary element and a multiplexer for selecting and outputting at least one of a plurality of signals input from the crossbar memory; a second lookup table composed of a crossbar memory and a multiplexer; and a switch that is connected to an output node of the first lookup table and to an output node of the second lookup table and that switches the output node of the first lookup table and the output node of the second lookup table to an electrically conductive state or a non-conductive state.

Inventors:
TSUJI Yukihide (7-1 Shiba 5-chome, Minato-k, Tokyo 01, 〒1088001, JP)
SAKAMOTO Toshitsugu (7-1 Shiba 5-chome, Minato-k, Tokyo 01, 〒1088001, JP)
MIYAMURA Makoto (7-1 Shiba 5-chome, Minato-k, Tokyo 01, 〒1088001, JP)
NEBASHI Ryusuke (7-1 Shiba 5-chome, Minato-k, Tokyo 01, 〒1088001, JP)
TADA Ayuka (7-1 Shiba 5-chome, Minato-k, Tokyo 01, 〒1088001, JP)
BAI Xu (7-1 Shiba 5-chome, Minato-k, Tokyo 01, 〒1088001, JP)
Application Number:
JP2018/033178
Publication Date:
March 14, 2019
Filing Date:
September 07, 2018
Export Citation:
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Assignee:
NEC CORPORATION (7-1 Shiba 5-chome, Minato-ku Tokyo, 01, 〒1088001, JP)
International Classes:
H03K19/177; G06F11/16; G11C29/00; H01L21/8239; H01L27/105; H01L45/00; H01L49/00
Attorney, Agent or Firm:
SHIMOSAKA Naoki (7-1 Shiba 5-chome, Minato-k, Tokyo 01, 〒1088001, JP)
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