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Title:
RECTIFICATION DEVICE, ALTERNATOR, AND POWER CONVERSION DEVICE
Document Type and Number:
WIPO Patent Application WO/2015/088020
Kind Code:
A1
Abstract:
A rectification device for an autonomous synchronous-rectification MOSFET is provided, which inhibits chattering, and which inhibits the flow of through current as a result of erroneous operation when noise is applied. This rectification device (132) is provided with: a rectification MOSFET (101) for performing synchronous rectification; a determination circuit (103) which inputs a voltage between a pair of main terminals of the rectification MOSFET (101), namely a positive-electrode-side main terminal (TH) and a negative-electrode-side main terminal (TL), and which determines, on the basis of the inputted voltage, whether the rectification MOSFET (101) is on or off; and a gate drive circuit (105) which is configured such that a gate of the rectification MOSFET (101) is turned on and off by a comparison signal (Vcomp) from the determination circuit (103), and such that the time period required to step up a gate voltage (Vgs) when the rectification MOSFET (101) is turned on is longer than a time period required to step down the gate voltage (Vgs) when the rectification MOSFET (101) is turned off.

Inventors:
ISHIMARU TETSUYA (JP)
ONDA KOHHEI (JP)
SAKANO JUNICHI (JP)
MORI MUTSUHIRO (JP)
Application Number:
PCT/JP2014/083028
Publication Date:
June 18, 2015
Filing Date:
December 12, 2014
Export Citation:
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Assignee:
HITACHI POWER SEMICONDUCTOR DEVICE LTD (JP)
International Classes:
H02M7/21; H02M1/08; H02M7/12
Foreign References:
JP2007110869A2007-04-26
JP2013005474A2013-01-07
JP2006320179A2006-11-24
JP2003243971A2003-08-29
JPH09105763A1997-04-22
JP2009296807A2009-12-17
JP2013158175A2013-08-15
JP2011507468A2011-03-03
JP2012147591A2012-08-02
Other References:
See also references of EP 3082244A4
Attorney, Agent or Firm:
ISONO Michizo (JP)
Michizo Isono (JP)
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