Title:
REFERENCE TIME-DETECTING CIRCUIT
Document Type and Number:
WIPO Patent Application WO/1983/001553
Kind Code:
A1
Abstract:
A video signal is supplied to first and second clamping circuits (40), (70) with different time constants, a synchronizing signal is separated from the output signal of the first clamping circuit (40) having a long time constant, and a reference time is detected from the output signal of the second clamping circuit (70) having a short time constant. Therefore, according to the present invention, since two clamping circuits (40), (70) with different time constants are provided, a signal in which the synch tip part is set to a predetermined voltage is obtained from the clamping circuit (40) with the long time constant, thereby accurately separating the vertical synchronization. Thus, an accurate masking pulse is formed, and a signal in which the noise in the pedestal part is suppressed is obtained from the clamping circuit (70) with the short time constant, thereby enabling the effective detection of the leading edge of the synchronizing signal.
Inventors:
YAMADA HISAFUMI (JP)
KURIKI CHOEI (JP)
SAITO JUNYA (JP)
KURIKI CHOEI (JP)
SAITO JUNYA (JP)
Application Number:
PCT/JP1982/000417
Publication Date:
April 28, 1983
Filing Date:
October 21, 1982
Export Citation:
Assignee:
SONY CORP (JP)
International Classes:
G04C9/04; G04R20/00; H04N5/08; H04N5/21; G04G7/00; (IPC1-7): H04N5/48; H04N5/08; H04N5/93
Foreign References:
| JPS4998516A | 1974-09-18 | |||
| JPS5637781A | 1981-04-11 |
Other References:
See also references of EP 0091966A4
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