Title:
REFRESH ADDRESS COUNTING CIRCUIT AND METHOD, REFRESH ADDRESS READ-WRITE CIRCUIT, AND ELECTRONIC DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/020016
Kind Code:
A1
Abstract:
A refresh address counting circuit, a refresh address counting method, a refresh address read-write circuit, and an electronic device, which relate to the technical field of integrated circuits. The refresh address counting circuit comprises: a self-oscillation clock generation module, used for generating, within each refresh cycle, a self-oscillation clock signal according to an array activation signal after a refresh signal is obtained; a self-oscillation shielding module, used for generating a self-oscillation shielding signal under a preset refresh command; and a refresh address counting module, used for counting a refresh address according to the self-oscillation clock signal and the self-oscillation shielding signal and outputting a self-oscillation refresh address. Provided is a refresh address counting circuit suitable for DDR5.
Inventors:
FAN XIAN (CN)
GU YINCHUAN (CN)
CAO XIANLEI (CN)
YANG YU (CN)
SU XINZHENG (CN)
GU YINCHUAN (CN)
CAO XIANLEI (CN)
YANG YU (CN)
SU XINZHENG (CN)
Application Number:
PCT/CN2022/090625
Publication Date:
February 23, 2023
Filing Date:
April 29, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
G11C11/406; G11C11/409
Foreign References:
CN109949844A | 2019-06-28 | |||
CN112837727A | 2021-05-25 | |||
US20130332669A1 | 2013-12-12 | |||
US20170069371A1 | 2017-03-09 |
Attorney, Agent or Firm:
BEIJING INTELLEGAL INTELLECTUAL PROPERTY AGENT LTD. (CN)
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