Title:
REPLAYING ARCHITECTURAL EXECUTION WITH A PROBELESS TRACE CAPTURE
Document Type and Number:
WIPO Patent Application WO/2012/009105
Kind Code:
A3
Abstract:
A system and method provide for capturing architecture data for software executing on a system, wherein the architecture data can include state data and event data. The captured architecture data may be replayed in a simulator, wherein failure information corresponding to the software is obtained from the simulator.
Inventors:
DEVARAJAN RAMESH (IN)
FRANKO JAEMON D (US)
FRANKO JAEMON D (US)
Application Number:
PCT/US2011/041086
Publication Date:
March 08, 2012
Filing Date:
June 20, 2011
Export Citation:
Assignee:
INTEL CORP (US)
DEVARAJAN RAMESH (IN)
FRANKO JAEMON D (US)
DEVARAJAN RAMESH (IN)
FRANKO JAEMON D (US)
International Classes:
G06F11/36; G06F9/455
Foreign References:
| US20060015852A1 | 2006-01-19 | |||
| US20070011517A1 | 2007-01-11 | |||
| US20030126505A1 | 2003-07-03 | |||
| US20060155525A1 | 2006-07-13 |
Other References:
See also references of EP 2585922A4
Attorney, Agent or Firm:
JORDAN, B., Delano et al. (PCc/o CPA Global,P.O. Box 5205, Minneapolis MN, US)
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