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Patent Searching and Data


Title:
RESETTING VIRTUAL MACHINE WITH DATA VERIFICATION FOR ROBUST RECOVERY
Document Type and Number:
WIPO Patent Application WO/2020/121051
Kind Code:
A1
Abstract:
In this invention we have a watchdog timer which is an electronic timer that is used to detect and recover from computer malfunctions. During normal operation, the computer regularly resets the watchdog timer to prevent it from elapsing, or timing out. If due to a program error it times out, a time out signal is triggered which is used to take corrective actions. Here we have the hypervisor or virtual machine monitor which monitors the health check responses, system state, etc. of the virtual machine and if it detects an error it does not reset the watchdog timer associated specifically for that virtual machine. The time out signal generated by that watchdog timer is used to reset the virtual machine and data verification is performed after boot up sequence of the virtual machine with another up to date backup of the virtual machine to check for data corruption.

Inventors:
SHARMA PRATIK (IN)
Application Number:
PCT/IB2018/060148
Publication Date:
June 18, 2020
Filing Date:
December 15, 2018
Export Citation:
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Assignee:
SHARMA PRATIK (IN)
International Classes:
G06F11/00
Foreign References:
US20170139777A12017-05-18
CA2658555C2017-06-20
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Claims:
Claims

Following is the claim for this invention:-

1. In this invention we have a watchdog timer which is an electronic timer that is used to

detect and recover from computer malfunctions. During normal operation, the computer regularly resets the watchdog timer to prevent it from elapsing, or timing out. If due to a program error it times out, a time out signal is triggered which is used to take corrective actions. Here we have the hypervisor or virtual machine monitor which monitors the health check responses, system state, etc. of the virtual machine and if it detects an error it does not reset the watchdog timer associated specifically for that virtual machine. The time out signal generated by that watchdog timer is used to reset the virtual machine and data verification is performed after boot up sequence of the virtual machine with another up to date backup of the virtual machine to check for data corruption. The above novel technique by which we restore the virtual machine from an erroneous state to stable state is the claim for this invention.

Description:
Resetting Virtual Machine with Data Verification For Robust Recovery

In this invention we have a watchdog timer which is an electronic timer that is used to detect and recover from computer malfunctions. During normal operation, the computer regularly resets the watchdog timer to prevent it from elapsing, or timing out. If due to a program error it times out, a time out signal is triggered which is used to take corrective actions. Here we have the hypervisor or virtual machine monitor which monitors the health check responses, system state, etc. of the virtual machine and if it detects an error it does not reset the watchdog timer associated specifically for that virtual machine. The time out signal generated by that watchdog timer is used to reset the virtual machine and data verification is performed after boot up sequence of the virtual machine with another up to date backup of the virtual machine to check for data corruption.