Title:
RESISTIVITY STANDARD SAMPLE MANUFACTURING METHOD AND EPITAXIAL WAFER RESISTIVITY MEASURING METHOD
Document Type and Number:
WIPO Patent Application WO/2018/037831
Kind Code:
A1
Abstract:
The present invention provides a resistivity standard sample manufacturing method comprising: a step of preparing a first conductivity-type silicon single-crystalline substrate; a step of measuring, using a thickness measuring device traceable to a national standard, the thickness of the silicon single-crystalline substrate; a step of fabricating an epitaxial wafer having a p-n junction by growing a second conductivity-type silicon epitaxial layer on the silicon single-crystalline substrate; a step of measuring the thickness of the epitaxial wafer using the thickness measuring device traceable to the national standard; a step of determining the thickness of the silicon epitaxial layer from the thicknesses of the epitaxial wafer and the silicon single-crystalline substrate; and a step of measuring the resistivity of the silicon epitaxial layer using a resistivity measuring device traceable to a resistivity standard substance. The resistivity standard sample manufacturing method enables the manufacture of a resistivity standard sample that is traceable to the resistivity standard substance, such as NIST.
Inventors:
KUME FUMITAKA (JP)
Application Number:
PCT/JP2017/027384
Publication Date:
March 01, 2018
Filing Date:
July 28, 2017
Export Citation:
Assignee:
SHINETSU HANDOTAI KK (JP)
International Classes:
H01L21/66; G01N27/00; G01N27/04; G01N27/22
Foreign References:
| JP2014116488A | 2014-06-26 | |||
| JP2010028011A | 2010-02-04 |
Attorney, Agent or Firm:
YOSHIMIYA Mikio et al. (JP)
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