US 5, 047, 913 discloses a resonant converter in which the resonant circuit is formed by two series-connected ca- pacitors, with connection to the positive and negative potentials of a supply voltage. There is a connection to a coil through a first set of semiconductor switches from a centre between the capacitors. The other connection of the coil is connected to a centre in a second set of electronic switches, which are connected to the positive potential and to the neutral potential, respectively, of the supply voltage. The other connection of the coil also provides a connection to a centre between two other se- ries-connected capacitors, which are connected to the positive and neutral potentials of the voltage supply.

Moreover, the other connection of the coil is connected to a second self-inductance from which there is a connec- tion to the output of the circuit.

However, the use of electronic switches between capaci- tors and self-inductance involves an undesired voltage drop if the switches consist of semiconductors. If great currents are to be carried, a great power loss occurs.

The object of the invention is to provide a resonant con- verter with the smallest possible power loss.

This can be achieved by a resonant converter like the one described in the opening paragraph, if it is constructed such that the first node (B) is in direct connection with a first set of electronic switches which set up a connec- tion to at least one output when the switches are closed, wherein the positive supply voltage and the negative sup- ply voltage, respectively, are connected to the output through a second set of electronic switches, wherein the electronic switches are opened and closed in dependence on an overall control system.

This ensures that a current running from the supply volt- age to the output just runs through a semiconductor in the forward direction. Because the voltage at the node fluctuates with the resonant frequency of the circuit be- tween the positive and negative values of the supply voltage, semiconductor switches may be opened at times with a minimal voltage drop which is ideally zero. This reduces the on and off losses of the semiconductors in the resonant converter, and transfer of great power can take place with a low generation of heat, thereby reduc- ing the cooling requirements.

The first node (B) may be connected to at least two semi- conductor components which are connected to the positive voltage potential and to the negative voltage potential.

It is ensured hereby that the voltage at the node cannot exceed the positive voltage supply and cannot be smaller than the negative voltage supply.

The first node (B) may also be connected to several branches, each of which consists of a first set of elec- tronic switches which set up a connection to outputs when the switches are closed, wherein the positive voltage supply and the negative voltage supply, respectively, are connected to the output through a second set of elec- tronic switches, wherein the electronic switches are opened and closed in dependence on an overall control system. The resonant converter may hereby be used for a multi-phased AC system. On the basis of the control of the semiconductors of the individual branches, each branch can control a phase which may be phase-shifted an arbitrary number of degrees.

The self-inductance, together with the capacitors, may form a resonant oscillation system, wherein the oscilla- tions are maintained by the electronic control system in dependence on the actual need on the outputs of the reso- nant converter. The amplitude of the resonant oscillation may hereby be maintained optimally without exceeding the potential of the supply voltage and without getting below the negative supply. If the oscillation amplitude can keep its peak to peak value close to the supply voltage, opening of the semiconductors by means of the control system may be optimized so that opening takes place with a minimal voltage drop across the semiconductors.

The resonant circuit may be designed so that the elec- tronic switches automatically close at an opposite cur- rent direction. Then, the control system is only to be constructed such that it can open the semiconductors.

The electronic switches may advantageously be opened or closed while there is a low voltage drop across the

switches. A low power dissipation may be achieved hereby while the semiconductors change state.

The circuit may be incorporated in a multi-phased fre- quency converter. The circuit may hereby be used for mo- tor control.

The circuit may also be used in a DC/DC converter.

Control signals for the semiconductor switches may be generated by the overall control system by means of a sigma delta converter. The control signals may hereby be formed in a simple manner using a minimum number of com- ponents.

The overall control system may contain a table of a plu- rality of allowed logic states, wherein another plurality of non-allowed states are excluded, wherein the non-al- lowed states cause short-circuit in the branches of the converter. Possible short-circuit states may hereby be eliminated effectively. Especially very brief short-cir- cuits in a converter branch are critical, because brief short-circuits of a duration of a few nanoseconds are difficult to detect, but very great power is dissipated in the semiconductors.

The invention will be explained below on the basis of sketches, where fig. 1 shows a single branch of the proposed converter, where fig. 2 shows a three level resonant converter with three output branches D, E and F, where

fig. 3 shows a sigma delta modulator, where fig. 4 shows an SDM signal (gOl, g02), where fig. 5 shows a simple synchronization of a resonant con- verter, where fig. 6 shows an alternative simple elimination of short- circuit states, where fig. 7 shows a modified circuit, where fig. 8 shows the simulation of a one-phase converter, where fig. 9 shows output voltage and current curves, where fig. 10 shows the distribution of current and the quality of the output voltage, and where fig. 11 shows the root-mean-square current (RMS) and the AVG current at S1 and S2 as well as the THD of the phase voltage VDN as a function of AV.

At the point B in fig. 1 the voltage Vac oscillates be- tween Vd and 0, and the two diodes in parallel with Cl and C2 clamp the voltage. The resonance is controlled by the current source impulse, which is magnetically coupled to the resonant circuit via Ls and Ll. Ipulse supplies the resonant circuit with an appropriate level of energy and compensates for the losses of the resonant circuit. Ipulse is adjusted according to the load conditions. The control of the resonance is completely independent of the main

switches, and hereby the resonance is easily made reli- able, and high frequency stress is avoided at the main switches.

With an oscillating voltage VBC at point B, soft switch- ing of the main switches is possible. A soft switch com- mutation from switch S1 to switch S2 is obtained by turn- ing S1 off when the voltage VAB is zero (zvsAB = true), and at the same turning S3 and S4 on. When VBC reaches zero (zvsBC = true), S3 and S4 are turned off, and S2 is turned on. (g2) (10) VDN Vd/2 short 0-Vd/2 cir. VDC Vd short Vd/2 0 cir. Table 1. Shows the relation between control signals and branch output voltage averaged over a resonance period.

The converter has three levels defined as S1 = ON, where VDC = Vd, and S2 = ON, where VDC = 0. The third level is reached when S3+S4 = ON in one resonance period, where the average of Vac is the same as Vd/2.

In fig. 2 a complete three-phase converter is shown. The wiring of the switches S3 and S4 enables the use of stan- dard dual-pack IC modules. The diodes connected in paral- lel to Cl and C2 may be eliminated by sufficient control of the switches S3 and S4, but due to safety precautions they are not removed herein.

If soft switching is used instead of hard switching of the switches, the switch losses are reduced, but it leads to a greater loss in resonant circuits.

The conduction losses are distributed between S1, S3, S4, S2 and diodes. Since the transistor losses are signifi- cantly greater relative to the diode losses, only the transistor losses are considered in the following. The conduction time is determined by the modulator which pro- duces an output signal controlling the switches, and the modulator just produces two output signals because S1 is inverse of S3 (Sl =/S3), and S2 is inverse of S4 (S2 = /S4).

A branch vector is defined as (gl, g2)' where gl controls S1+S3, and g2 controls S2+S4. Four combinations are poss- ible. Table 1 shows the relation between branch vector and branch voltage VDN and VDC.

Fig. 3 shows a sigma delta modulator (SDM) which is simple and efficient.

Sigma delta modulator : signals (gl, glare synchronized with zero voltage intervals zvsAB and zvsBC.

The sigma delta modulator has an internal analog feedback with three states (1, 0,-1) and a 2-bit digital output (gl, g2)'. The distribution of current between S1, S2 and S3+S4 depends on the hysteresis voltage band AV shown in fig. 4.

Fig. 4 shows an SDM signal (gOl, g02)' as a function of integration where error signals error.

The states (g01, g02)' cannot be transferred directly to the switches, and a change in the state of the branch may have as a result that certain restrictions and time re- quirements must be kept to prevent the branch from short- circuiting or hard switching.

Fig. 5 shows a simple synchronization of g01, gO2 with zvsAB and zvsBC, but the shown synchronization of gOl and g02 is not sufficient to prevent a short-circuit.

Limiting the change in the state of the branch to zero volt intervals gl at zvsAB and g2 at zvsBC is no guaran- tee of a rational state. Fig. 5 shows a situation of short-circuit. Solving the problem by replacing the state (1, 0)'by (0, 1)'might seem to be an easy solution, but this is not the case. It can be observed in fig. 5 that an identical gOl and g02 is obtained by using AV = 0.

In fig. 6 it is also shown how a simple elimination of the short-circuit state is not enough to guarantee a cor- rect control of the branch. Here, the short-circuit is avoided, but an undesirable hard switching occurs. To avoid the hard switching and the short-circuit it is nec- essary to analyze all the possible states.

The question is how the changes in the branch state can be limited to be allowed changes in the state. Before changing the state of the branch, it is necessary to evaluate the latched values of (g01, gO2), and based on the result of the evaluation the signals of the branch state (gl, g2)' are changed. The latched values of (gOl, g02)' are re-named (gAl, gA2).

As shown in fig. 6, it is not allowed to change the state of the branch from (0, 0)' to (0, 1)' when the slope of the resonant link voltage Vac is negative. The state (gl, g2) @ of the branch must be in accordance with the slop of VBC.

Five logic level signals will be described below : (gAl, gA2, slope, gl, g2) The five signals give complete information on the state of the branch, and in total there are 32 combinations.

Some of these are allowed, others are not. Each combina- tion is considered, and a look-up table or a state table is created.

Fig. 7 shows a modified circuit No States New . slo glA g2A gl G2 gl g2 pe 01111111 1 0 1 1 1 1 1 1 2 1 0 1 1 1 1 1 3 0 0 1 1 1 0 1 6 1 0 0 1 1 1 1 70001101 81110101 9 0 1 1 0 1 1 1 10 1010101 11 0 0 1 0 1 0 1 14 1 0 0 0 1 0 0 15 0000101 24 1 1 1 0 0 0 1 25 0 1 1 0 0 0 0 26 1 0 1 0 0 0 1 27 0 0 1 0 0 0 0 30 1000000 31 0 0 0 0 0 0 0 Table 2. State machine used in modified SDM.

The contents of the state table is shown in table 2.

In,, table 2, only 18 of the 32 states are shown after the elimination of all non-allowed states (1, 0)'.

Fig. 8 shows the simulation of a one-phase converter, where a current source feeds the converter with an RMS current of 10 A and a phase angle of-37 degrees.

Fig. 9 shows output voltage and current curves using AV = 0. 5. The significance of du is illustrated in fig. 10, where a zoom on the phase voltage Vow and current is shown, using AV = 0 in the upper curve which shows VDN, and using AV = 0. 5 in the middle curve which shows VoM.

Increasing AV also increases the number of branch states that generate half DC link voltage.

It is clear from fig. 10 that the current distribution and the output voltage quality change with AV.

A series of simulations is carried out, where AV is changed from 0 to 0. 7, and then the RMS current and the AVG current in S1, S3, S4 and S2 are calculated, it being noted that the RMS and AVG values of S1 and S2 are the same. The same is observed with the current in S3 and S4.

It is therefore only necessary to show the RMS and AVG current values of the current in S1 and S3. Furthermore, the THD of the phase voltage VDN is calculated.

The results are shown in figure 11, and it is noted that the current distribution between the switches becomes more equal as AV increases. The TDH level is also im- proved as AV increases, however no or just a slight im- provement occurs after AV = 0. 5 has been reached.