STATEMENT OF GOVERNMENT INTEREST

This invention was made with government support under Contract Number FA955G-15-1 -0051 awarded by the U.S. Air Force Office of Scientific Research. The government has certain rights in the invention.

COPYRIGHT NOTICE

A portion of the disclosure of this patent document contains material that is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and T rademark Office patent files or records, but otherwise reserves all copyright rights whatsoever

Technical Field

The present disclosure relates to systems and methods to produce high voltage, high power nanosecond pulses, which may, for example, be advantageously employed in the generation of non-thermal plasmas. More particularly, the present disclosure relates to resonant pulsed voltage multiplier and capacitor charger circuits and methods.

BACKGROUND

Description of the Related Art

Capacitor charges are commonly used to charge a load capacitance to a pre-specified voltage level. In pulsed power applications that require a high pulse repetition rate (PRR), capacitors oftentimes need to be charged to high voltage very quickly, requiring high instantaneous power. BRIEF SUMMARY

In order to increase the peak power of a capacitor charger, without requiring excessively high switching current, the present disclosure provides various embodiments of half-cycle, pulsed, resonant voltage multiplier circuits and methods capable of rapidly charging a capacitor.

Briefly and in general terms, the present disclosure is directed to a system for charging a load capacitor that is subsequently discharged into a resonant circuit that energizes an opening switch for the purpose of producing high voltage pulses with high instantaneous power in the various

embodiments provided by the present disclosure, a resonant pulsed voltage multiplier and capacitor charger charges the pulse generator circuitry that produces a high voltage, unipolar pulse, which may be used, for example, for generating non-equilibrated plasmas and/or pulsed electric fields.

In some embodiments, the resonant pulsed voltage multiplier and capacitor charger is directly powered by an available DC power source, and, depending on the desired attributes of the pulse, the DC power source may be adjustable between 0 - 1 ,200 VDC.

As disclosed herein, voltage multiplication is achieved by switching pre-charged capacitors in series. This is realized by individual voltage multiplying ceils or stages that are appropriately connected to one another. The multiplication factor achieved is given by the number of individual voltage multiplying stages plus one.

in one or more embodiments, the present disclosure provides a method that includes supplying a DC charging voltage to a plurality of capacitors of a voltage multiplying circuit; and resonantly charging a load capacitor of a first resonant circuit that includes the load capacitor and a first inductor to a voltage that is an integer multiple of the DC charging voltage by selectively electrically coupling each of the capacitors of the voltage multiplying circuit in series with one another and with the load capacitor.

in another embodiment, the present disclosure provides a resonant pulsed voltage multiplier and capacitor charger that includes a charge circuit, a voltage multiplying circuit electrically coupled to the charge circuit, and a recharge circuit electrically coupled to the voltage multiplying circuit. The charge circuit includes a load capacitance and a charge circuit inductor electrically coupled to one another. The voltage multiplying circuit includes a plurality of voltage multiplying stages, and each of the plurality of voltage multiplying stages includes a capacitor and a first switch. The first switches of the plurality of voltage multiplying stages are operable to selectively electrically couple the capacitors of the plurality of voltage multiplying stages in series, and to selectively electrically couple the capacitors of the plurality of voltage multiplying stages in parallel. The recharge circuit includes a DC power supply that is operable to supply a DC charging voltage to the capacitors of the plurality of voltage multiplying stages.

The structures, articles and methods described herein can be advantageously employed In a variety of different applications. For example, the structures, articles and methods described herein can be employed to generate pulsed power to produce a plasma, for instance a non-thermal plasma. Such can, for example, be advantageously used in applications involving pulsed power to improve efficiency of performance of combustion engines. For example, structures, articles and methods described herein may be implemented as part of, or in connection with a signal generating source that supplies pulsed power to a transient plasma circuit (e.g., via a standard ignition coil) that outputs at least one signal (e.g., an electrical pulse having a voltage and a current) that is destined to breakdown over a spark gap (e.g., the spark gap of a spark plug, a static spark gap, a rotary spark gap, and the like) at a first voltage. For example, the transient plasma circuit may be integrated into a spark plug or at any location between the signal generating source and the spark gap. The signal generating source may be integrated into the transient plasma circuit. Such can, for example, be advantageously used in applications involving pulsed power to treat textiles. The foregoing summary does not encompass the claimed subject matter in its entirety, nor are the embodiments intended to be limiting. Rather, the embodiments are provided as mere examples.

The present disclosure addresses these and other needs.

Other features of the disclosed embodiments will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, which illustrate, by way of example, the principles of the disclosed embodiments.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

Figure 1 is a high level schematic diagram, illustrating a resonant pulsed voltage multiplier and capacitor charger, in accordance with one or more embodiments.

Figure 2 is a schematic diagram illustrating a resonant pulsed voltage multiplier and capacitor charger including a plurality of resistors for facilitating charging of the capacitors before an initial charge cycle occurs, in accordance with one or more embodiments.

Figure 3 is a schematic diagram illustrating a voltage multiplying stage, which may be included in a resonant pulsed voltage multiplier and capacitor charger, in accordance with one or more embodiments.

Figure 4 is a schematic diagram illustrating a resonant pulsed voltage multiplier and capacitor charger electrically coupled to a pulse generator circuit, in accordance with one or more embodiments.

DETAILED DESCRIPTION

The present disclosure relates to circuits that are operable to quickly charge a load capacitance to a voltage level that Is some multiple of the Input DC voltage. In one or more embodiments, the load capacitance that is charged is the input capacitance of another subsequent circuit, such as a pulse generator circuit that generates a pulse based on a charge stored in the load capacitance. Figure 1 is a high level schematic diagram illustrating a resonant pulsed voltage multiplier and capacitor charger 10, in accordance with one or more embodiments. The resonant pulsed voltage multiplier and capacitor charger 10 includes a recharge circuit 12, a voltage multiplying circuit 14, and a charge circuit 18. The charge circuit 18 charges a load capacitance C _L , the voltage multiplying circuit 14 multiplies an input DC voltage by a integer multiple “n”, and the recharge circuit 12 recharges the capacitors of the voltage multiplying circuit 14.

The recharge circuit 12 includes a DC power supply 13 and a capacitor C1 electrically coupled to one another in parallel. The recharge circuit 12 further includes a rectifier, such as a diode D1 , and an inductor L1 that may be selectively coupled, via a switch S 1 , to the DC power supply 13 and the capacitor C1 .

The voltage multiplying circuit 14 is electrically coupled to the recharge circuit 12 and to the charge circuit 18, and more particularly, the voltage multiplying circuit 14 is electrically coupled between the recharge circuit 12 and the charge circuit 16. The voltage multiplying circuit 14 includes an input capacitor C ₂ and a plurality of voltage multiplying stages 15. Each of the voltage multiplying stages includes a respective diode D ₂ - D ₄ , a respective capacitor C ₂ - Cs, a respective first switch S ₂ - S ₄ , and a respective second switch S ₅ - S ₇ . Figure 3 is a schematic diagram illustrating a single voltage multiplying stage 15 of the voltage multiplying circuit 14.

in operation, the capacitors C ₂ - C ₅ of the voltage multiplying circuit 14 are initially charged to a DC voltage, as may be provided from the DC power supply 13. During charging of the capacitors C ₂ - Cs, the first switches S ₂ - S ₄ are in a non-conducting state, and the second switches Ss - S _? are in a conducting state.

The first switches S ₂ - S ₄ of the voltage multiplying circuit 14 are simultaneously or concurrently triggered to transition from the non-conducting state to the conducting state, and the second switches S ₅ - S ₇ are

simultaneously or concurrently triggered to transition from the conducting state to the non-conducting state, at some time after the capacitors C ₂ - Cs are suitably charged. At this time, the capacitors C ₂ - Cs are connected in series through the conducting first switches S ₂ - S ₄ and the diodes D ₂ - D ₄ of the voltage multiplying circuit 14 are reverse biased. By connecting the capacitors C ₂ - Cs in series, the voltage multiplying circuit 14 multiplies the DC charging voltage, e.g., provided from the DC power supply 13, by the number of cells or stages 15 in the voltage multiplying circuit 14 plus one, due to the charging voltage stored in the input capacitor C ₂ , which is in addition to the charging voltage stored in the capacitors Cs - Cs of the voltage multiplying stages 15. in the implementation shown in Figure 1 , the multiplying factor is 4, as there are three voltage multiplying stages 15, and one input capacitor C ₂ ; however, embodiments provided herein are not limited to this particular implementation, but instead may include more or less than three voltage multiplying stages, and more or less than one input capacitor.

Sometime after the first switches S ₂ - S ₄ are triggered to operate in the conducting state, the switch Ss of the charge circuit 16 is triggered to transition from a non-conducting state to a conducting state, at which time the load capacitor C _L of the charge circuit 16 is resonantly charged by the series combination of C ₂ - Cs through the charge circuit inductor L ₂ . The charge circuit 16 further includes a diode Ds that acts as a rectifier, preventing charge from flowing back from the load capacitor C _L into the capacitors C ₂ - Cs of the voltage multiplying circuit 14. The charge circuit inductor l_ ₂ limits the peak current and sets the amount of time required for charge transfer from the capacitors C ₂ - Cs into the load capacitor C _L . The load capacitor C _L may be suitably charged within a single half-cycle of a resonant period of the resonant circuit that includes the load capacitor C _L and the charge circuit inductor L ₂ .

In one or more embodiments, each of the capacitors C ₂ - Cs of the voltage multiplying circuit 14 have a same or substantially same

capacitance. For example, each of the capacitors C ₂ - Cs may have an equal capacitance, except for variations that may be attributable to process or temperature spreads, as capacitance values of particular capacitors are dependent on process and temperature spreads. In a case where each of the capacitors C ₂ - Cs of the voltage multiplying circuit 14 has an equal

capacitance, the load capacitor C _L is charged to a voltage that is equal to“n” times the DC charging voltage supplied from the DC power supply 13, where “n” is equal to the number of capacitors of the voltage multiplying circuit 14 that are electrically coupled in series (i.e., the input capacitor C ₂ plus the capacitors of the voltage multiplying stages 15), and the“n” series-connected capacitors have an equivalent capacitance that is equal to the capacitance C of each of the individual capacitors divided by the number“n” of capacitors. The maximum theoretical voltage that the load capacitor C _L can be charged to is given by 2 ^c n ^c input DC voltage. The load capacitor C _L is charged to a voltage that is between n times the DC charging voltage supplied from the DC power supply 13 and 2 ^* n times the DC charging voltage, depending on a chosen ratio of the capacitance of the load capacitor C _L to the equivalent series capacitance of the capacitors of the voltage multiplying circuit 14, e.g., the equivalent series capacitance of capacitors C ₂ - Cs.

After the load capacitor C _L is suitably charged (e.g., within a single half-cycle of the resonant period of the resonant circuit that includes the load capacitor C _L and the charge circuit inductor l_ ₂ ), the first switches S ₂ - S ₄ of the voltage multiplying circuit 14 and the switch Ss of the charge circuit 18 are simultaneously or concurrently triggered to transition from the conducting state to the non-conducting state, and the second switches Ss - S _? are triggered to transition from the non-conducting state to the conducting state. The second switches Ss - S _? provide a recharge return path to the recharge circuit 12. For example, the second switches Ss - S _? may provide a path to the recharge circuit 12 and to a common ground for each of the capacitors C ₂ - Cs during recharging. Sometime after this, the switch Si of the recharge circuit 12 is triggered to transition from the non-conducting state to the conducting state. At this time, the diodes D ₂ - D ₄ are forward biased and the capacitors C ₂ - Cs are resonantly recharged by the capacitor Ci of the recharge circuit 12 through the inductor Li of the recharge circuit 12. The diode Di of the recharge circuit 12 acts as a rectifier, preventing charge from flowing back from capacitors C ₂ - Cs into capacitor Ci. With the switches S _? _ - S ₄ and Ss in the non-conducting state, and the switch Si in the conducting state, the capacitors C ₂ - Cs are electrically coupled in parallel with one another for recharging by the DC power supply 13, or by the capacitor Ci which may be charged from the DC power supply 13. The inductor Li limits the peak recharge current and sets the amount of time required for charge transfer from the capacitor Ci to the capacitors C ₂ - Cs of the voltage multiplying circuit 14. The diode Di of the recharge circuit 12 serves as a rectifier, preventing charge from flowing back from the capacitors C ₂ - Cs of the voltage multiplying circuit 14 into the capacitor Ci of the recharge circuit 12. After the capacitors C ₂ - Cs are recharged, the switch Si is triggered to transition from the conducting state to the non-conducting state. This completes one full charge cycle, and the circuit may be operated as described above to repeat this process indefinitely.

in one or more embodiments, the switch Ss of the charge circuit 16 includes a plurality of switches that are electrically coupled in a series- parallel arrangement. Such an arrangement of multiple switches in series- parallel may increase an effective voltage and a current rating of the switch Ss.

in one or more embodiments, one or more of the diodes Di - Ds may be composed of multiple diodes electrically coupled in a series-parallel arrangement, which may increase an effective voltage and a current rating of the diodes Di - D ₅ .

Figure 2 is a schematic diagram illustrating a resonant pulsed voltage multiplier and capacitor charger 1 10 including a plurality of resistors Ri - R _? for facilitating charging of the capacitors C ₂ - Cs before an initial charge cycle occurs, in accordance with one or more embodiments. The resonant pulsed voltage multiplier and capacitor charger 1 10 shown in Figure 2 is similar to the resonant pulsed voltage multiplier and capacitor charger 10 shown in Figure 1 , except for the differences discussed below. In particular, the switches Si - Ss of the resonant pulsed voltage multiplier and capacitor charger 10 shown in Figure 1 are realized with MOSFETs Qi - Qg in the resonant pulsed voltage multiplier and capacitor charger 1 10 of Figure 2 Additionally, the voltage multiplying circuit 1 14 of the resonant pulsed voltage multiplier and capacitor charger 1 10 includes resistors Ri - R ₇ , which provide a DC path from each of the capacitors C ₂ - Cs back to the primary capacitor Ci of the recharge circuit 1 12 The purpose of the resistors Ri - R _? is to provide a path by which C ₂ - C ₅ may be charged before the initial charge cycle occurs. The operation of the resonant pulsed voltage multiplier and capacitor charger 1 10 depicted in Figure 2 is otherwise the same as for the resonant pulsed voltage multiplier and capacitor charger 10 shown in Figure 1 .

in the resonant pulsed voltage multiplier and capacitor charger 1 10 shown in Figure 2, switching is achieved using OSFETs Gi - Gs.

MQSFETs may preferably be used in one or more embodiments due to their fast turn-on time; however, other switches may be used, including, but not limited to, insulated gate bipolar transistors (!GBTs), thyristors, silicon controlled thyristors, bipolarjunction transistors, other field effect transistors, thyratrons, spark gap switches, photoconductive solid state switches, or any solid state, avalanche, optically triggered or gas discharge switches.

Figure 3 is a schematic diagram illustrating an individual voltage multiplying stage 15, which may be included, for example, in the resonant pulsed voltage multiplier and capacitor charger 10 shown in Figure 1 and in the resonant pulsed voltage multiplier and capacitor charger 1 10 shown in Figure 2. Referring back to Figures 1 and 2, each of the resonant pulsed voltage multiplier and capacitor chargers 10, 1 10 includes three of voltage multiplying stages, providing a multiplication factor at the cathode of diode D ₄ (i.e. , at an output of the voltage multiplying circuits 14, 1 14) of four. In general, the number of voltage multiplying stages 15 in a resonant pulsed voltage multiplier and capacitor charger may be as many as desired depending on application, from 0 to N stages, where N is the number of voltage multiplying stages 15 required to achieve the desired output voltage.

Figure 4 is a schematic diagram illustrating a resonant pulsed voltage multiplier and capacitor charger 210 electrically coupled to a pulse generator circuit 218, in accordance with one or more embodiments. The resonant pulsed voltage multiplier and capacitor charger 210 may include a recharge circuit 12 and a voltage multiplying circuit 14 that are substantially the same as the recharge circuit 12 and the voltage multiplying circuit 14 shown in Figure 1 . However, in the resonant pulsed voltage multiplier and capacitor charger 210, the load capacitance (i.e., the capacitance of the load capacitor C _L ) is included in the charge circuit 218, and is also included as a part of a resonant circuit in the pulse generator circuit 218 that is used to drive a diode opening switch Dos. Diode opening switches are typically designed to rapidly transition into a non-conducting reversed bias state at a time when electrical current is flowing from cathode to anode through the device. This rapid transition from a conducting to non-conducting state interrupts the current flowing from cathode to anode, and this current is diverted to a load (e.g., as represented by the load impedance Z _L ), where it creates a fast rising electrical pulse. The voltage amplitude of the pulse is proportional to i ^c Z _L , where I is the electrical current and Z _L is the load impedance. The resonant pulsed voltage multiplier and capacitor charger 210 provides a circuit structure that is operable to rapidly recharge the diode opening switch Dos circuit, which facilitates achieving a high pulsed repetition rate. It also facilitates achieving higher output voltage from the diode opening switch Dos by enabling the designer to multiply the DC input voltage as desired.

In the implementation shown in Figure 4, the circuitry (i.e., the resonant pulsed voltage multiplier and capacitor charger 210) that charges the load capacitor C _L operates in the same or substantially same way as described above with respect to the resonant pulsed voltage multiplier and capacitor charger 10 shown in Figure 1 , except that the current that charges the load capacitor C _L flows through the series combination of the load capacitor C _L and a first inductor Ln of the pulse generator circuit 218. The impedance of the first inductor Ln is significantly less than the impedance presented by the series- parallel arrangement of the pulse generator circuit capacitor Cn , the second inductor Li ₂ , the diode opening switch Dos, and the load Z _L on the charging time scale, so a negligible amount of the charging current flows through this alternate path. Once the load capacitor C _L is fully charged, the switch Ss of the pulse generator circuit 218 is triggered from a non-conducting to a conducting state, and the load capacitor C _L is discharged into the resonant circuit that includes the load capacitor C _L , the pulse generator circuit capacitor C _TI , the first inductor L _TI , and the second inductor L _T2 . The current flowing in this resonant circuit pumps the diode opening switch Dos which produces a high voltage pulse across the load Z _L once the diode opening switch Dos becomes reverse biased.

in one or more embodiments, the pulse may be a nanosecond- scale pulse having a length of equal to or less than 100 nanoseconds at the full- width-at-half-maximum (FHWM) and an amplitude of at least 1 kV. In one or more embodiments, the pulse may have a length within a range of 10 nanoseconds, inclusive, to 10 nanoseconds, inclusive, at the FHWM. In one or more embodiments, the pulse may have an amplitude within a range of 10kV, inclusive, to 40kV, inclusive. In some embodiments, the pulse has an amplitude that is greater than 40kV.

The various embodiments and examples described above are provided by way of illustration only and should not be construed to limit the claimed invention, nor the scope of the various embodiments and examples. Those skilled in the art will readily recognize various modifications and changes that may be made to the claimed invention without following the example embodiments and applications illustrated and described herein, and without departing from the true spirit and scope of the claimed invention, which is set forth in the following claims.

Various structures, articles, and methods described herein may be advantageously employed in specific applications or with other structures, articles, and methods, such as those described in U.S. Provisional Patent Application No. 81/717,044, filed October 22, 2012; U.S Non-Provisional Patent Application No. 14/052,437, filed October 1 1 , 2013 (published as US 2014/0109886); U.S. Provisional Patent Application No. 61/916,693 filed December 16, 2013; U.S Non-Provisiona! Patent Application No. 14/571 ,128 filed December 15, 2014 (granted as U.S. 9,617,965); U.S Non-Provisiona! Patent Application No. 15/444,1 12, filed February 27, 2017 (published as US 2017/0167464); and U.S. Provisional Patent Application No. 62/620289 filed January 22, 2018, each of which is incorporated herein by reference in their entireties.

The various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.