Title:
REWRITING METHOD FOR SEMICONDUCTOR STORAGE APPARATUS, AND SEMICONDUCTOR STORAGE APPARATUS
Document Type and Number:
WIPO Patent Application WO/2016/157719
Kind Code:
A1
Abstract:
The present invention includes: a first rewriting step for applying a precharge voltage to both a plurality of bit lines and a plurality of source lines; a second rewriting step for applying a rewriting voltage to either a selected bit line or a selected source line; a third rewriting step for applying the rewriting voltage to both the selected bit line and the selected source line; a fourth rewriting step for applying the precharge voltage to either the selected bit line or the selected source line; and a fifth rewriting step for applying the precharge voltage to both the selected bit line and the selected source line.
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Inventors:
NAGAI HIROYASU
Application Number:
PCT/JP2016/001123
Publication Date:
October 06, 2016
Filing Date:
March 02, 2016
Export Citation:
Assignee:
PANASONIC IP MAN CO LTD (JP)
International Classes:
G11C13/00
Domestic Patent References:
| WO2013076935A1 | 2013-05-30 |
Foreign References:
| JP2011204358A | 2011-10-13 | |||
| JP2007184063A | 2007-07-19 | |||
| JPH0877786A | 1996-03-22 |
Attorney, Agent or Firm:
KAMATA, Kenji et al. (JP)
Kenji Kamata (JP)
Kenji Kamata (JP)
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