Title:
SAFE EXECUTION IN PLACE (XIP) FROM FLASH MEMORY
Document Type and Number:
WIPO Patent Application WO/2018/187771
Kind Code:
A3
Abstract:
A method for safe execution in place (XIP) processing from flash memory includes receiving (400) a read command from a processor in an error correcting code (ECC) engine coupled between the processor and a flash interface controller coupled to the flash memory, translating (401) a read address to an error correcting code (ECC) block address by the ECC engine, wherein an ECC block includes a data block and an ECC code for the data block, reading (404) by the ECC engine the ECC block at the ECC block address from the flash memory via the flash interface controller, and verifying (406) by the ECC engine the ECC code in the read ECC block.
Inventors:
ABERL PETER (DE)
DUBEY AISHWARYA (US)
SAGAR RAJAT (US)
FALIK ELDAD (US)
DUBEY AISHWARYA (US)
SAGAR RAJAT (US)
FALIK ELDAD (US)
Application Number:
PCT/US2018/026594
Publication Date:
November 08, 2018
Filing Date:
April 06, 2018
Export Citation:
Assignee:
TEXAS INSTRUMENTS INC (US)
TEXAS INSTRUMENTS JAPAN LTD (JP)
TEXAS INSTRUMENTS JAPAN LTD (JP)
International Classes:
G06F12/10; G06F11/10; G11C29/42
Foreign References:
| US20100251074A1 | 2010-09-30 | |||
| US20150301890A1 | 2015-10-22 | |||
| US20140015565A1 | 2014-01-16 | |||
| US20130013851A1 | 2013-01-10 |
Other References:
PRIYANKA P. ANKOLEKAR ET AL.: "Multibit Error-Correction Methods for Latency-Constrained Flash Memory Systems", IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, vol. 10, no. 1, March 2010 (2010-03-01), pages 33 - 39, XP011347998
Attorney, Agent or Firm:
DAVIS JR., Michael, A. et al. (US)
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