Title:
SCAN SIGNAL LINE DRIVE CIRCUIT AND DISPLAY DEVICE PROVIDED THEREWITH
Document Type and Number:
WIPO Patent Application WO/2011/129126
Kind Code:
A1
Abstract:
In order to enhance the stability of a circuit operation in a monolithic gate driver, a bistable circuit is provided with a charge replenishment circuit (71) configured from a capacitor (CAP2), a thin-film transistor (MA) having a first electrode to which a first clock (CKA) for charge replenishment is applied, a second electrode connected to a third node (N3) connected to one end of the capacitor (CPA2), and a third electrode connected to a second node (N2) that should be maintained high during a normal operation period, and a thin-film transistor (MB) having a first electrode to which a second clock (CKB) for charge replenishment is applied, a second electrode to which high-level direct-current power supply potential (VDD) is applied, and a third electrode connected to the third node (N3). The first clock (CKA) for charge replenishment and the second clock (CKB) for charge replenishment are alternately driven high so that a period in which "the first clock (CKA) for charge replenishment goes high and the second clock (CKB) for charge replenishment goes high" does not occur.
Inventors:
TAKAHASHI, Yoshihisa (())
高橋 佳久 (())
高橋 佳久 (())
Application Number:
JP2011/050781
Publication Date:
October 20, 2011
Filing Date:
January 18, 2011
Export Citation:
Assignee:
SHARP KABUSHIKI KAISHA (22-22, Nagaike-cho Abeno-ku, Osaka-sh, Osaka 22, 〒5458522, JP)
シャープ株式会社 (〒22 大阪府大阪市阿倍野区長池町２２番２２号 Osaka, 〒5458522, JP)
TAKAHASHI, Yoshihisa (())
シャープ株式会社 (〒22 大阪府大阪市阿倍野区長池町２２番２２号 Osaka, 〒5458522, JP)
TAKAHASHI, Yoshihisa (())
International Classes:
G09G3/36; G02F1/133; G09G3/20; G11C19/00; G11C19/28; H03K17/687
Attorney, Agent or Firm:
SHIMADA, Akihiro (Shimada Patent Firm, Manseian Building 1-10-3, Yagi-cho, Kashihara-sh, Nara 78, 〒6340078, JP)
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Claims:
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