Title:
SCANNING SIGNAL LINE DRIVE CIRCUIT AND DISPLAY DEVICE PROVIDED WITH SAME
Document Type and Number:
WIPO Patent Application WO/2011/148658
Kind Code:
A1
Abstract:
Provided is a monolithic gate driver that operates with relatively few circuit elements. A component circuit constituting each stage of a shift register comprises: two output terminals (61, 62) connected to a scanning signal line; two thin-film transistors (MA1, MB1) in which an output control clock signal is provided to drain terminals, and source terminals are connected to the output terminals; a first node (N1) connected to the two thin-film transistors (MA1, MB1); a first node control circuit (420); and an input terminal (41) that receives a set signal (S). In a configuration such as this, the first node (N1) changes from an off-level to an on-level on the basis of the set signal (S). The first node control circuit (420) changes the first node (N1) from an on-level to an off-level.
Inventors:
TAKAHASHI, Yoshihisa (())
Application Number:
JP2011/050782
Publication Date:
December 01, 2011
Filing Date:
January 18, 2011
Export Citation:
Assignee:
SHARP KABUSHIKI KAISHA (22-22, Nagaike-cho Abeno-ku, Osaka-sh, Osaka 22, 〒5458522, JP)
シャープ株式会社 (〒22 大阪府大阪市阿倍野区長池町２２番２２号 Osaka, 〒5458522, JP)
シャープ株式会社 (〒22 大阪府大阪市阿倍野区長池町２２番２２号 Osaka, 〒5458522, JP)
International Classes:
G09G3/36; G09G3/20; G11C19/00; G11C19/28
Attorney, Agent or Firm:
SHIMADA, Akihiro (Shimada Patent Firm, Manseian Building 1-10-3, Yagi-cho, Kashihara-sh, Nara 78, 〒6340078, JP)
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Claims: