Title:
SEMICONDUCTOR APPARATUS
Document Type and Number:
WIPO Patent Application WO/2018/012598
Kind Code:
A1
Abstract:
This semiconductor apparatus has an MIS structure that includes: a semiconductor layer; a gate insulating film on the semiconductor layer; and a gate electrode on the gate insulating film. The gate insulating film has a laminate structure that includes: a substrate SiO2 layer; and a High-k layer that contains Hf located on the substrate SiO2 layer. The gate electrode includes a section that is made of a metal material having a work function larger than 4.6 eV at least in a part in contact with the High-k layer.
Inventors:
YAMAMOTO KENJI (JP)
AKETA MASATOSHI (JP)
ASAHARA HIROKAZU (JP)
NAKAMURA TAKASHI (JP)
HOSOI TAKUJI (JP)
WATANABE HEIJI (JP)
SHIMURA TAKAYOSHI (JP)
AZUMO SHUJI (JP)
KASHIWAGI YUSAKU (JP)
AKETA MASATOSHI (JP)
ASAHARA HIROKAZU (JP)
NAKAMURA TAKASHI (JP)
HOSOI TAKUJI (JP)
WATANABE HEIJI (JP)
SHIMURA TAKAYOSHI (JP)
AZUMO SHUJI (JP)
KASHIWAGI YUSAKU (JP)
Application Number:
PCT/JP2017/025584
Publication Date:
January 18, 2018
Filing Date:
July 13, 2017
Export Citation:
Assignee:
ROHM CO LTD (JP)
UNIV OSAKA (JP)
UNIV OSAKA (JP)
International Classes:
H01L29/78; H01L21/28; H01L21/283; H01L21/336; H01L29/12
Domestic Patent References:
| WO2010050291A1 | 2010-05-06 | |||
| WO2014087975A1 | 2014-06-12 | |||
| WO2007105413A1 | 2007-09-20 |
Foreign References:
| JP2015198185A | 2015-11-09 | |||
| JPS63119266A | 1988-05-23 | |||
| JP2016066641A | 2016-04-28 | |||
| JP2012129503A | 2012-07-05 |
Attorney, Agent or Firm:
AI ASSOCIATION OF PATENT AND TRADEMARK ATTORNEYS (JP)
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