SEMICONDUCTOR CHIP AND METHOD FOR MANUFACTURING SAME

WIPO Patent Application WO/2020/042493

A1

Disclosed are a semiconductor chip and a method for manufacturing same. The semiconductor chip comprises: a substrate (1), and an isolation layer (2) and a functional layer (3) successively arranged on the substrate (1) in a stacked manner, wherein the isolation layer (2) comprises a lower suspension layer (21) and a sacrificial layer (22), the lower suspension layer (21) being arranged on the substrate (1), and the sacrificial layer (22) being arranged on the lower suspension layer (21); the isolation layer (2) further comprises a suspension area (4), with the lower suspension layer (21) and the sacrificial layer (22) being arranged in a circumferential direction of the suspension area (4); and the depth of the suspension area (4) is greater than the thickness of the sacrificial layer (22). The functional layer (3) of the semiconductor chip is suspended on the substrate (1) by means of the suspension area (4). Since the depth of the suspension area (4) is greater than the thickness of the sacrificial layer (22), an air space between the functional layer (3) and the substrate (1) is large, thereby achieving good thermal insulation in order to effectively reduce the occurrence of heat dissipation through a substrate so as to conduct most of the heat to a thermally tuned electrode, thereby improving the thermally tuned efficiency of a chip.

ZHAO JIANYI (CN)
YU SIJIA (CN)
YUE AIWEN (CN)
YANG FAN (CN)
HU MINYUAN (CN)
CHEN RUSHAN (CN)

PCT/CN2018/123700

March 05, 2020

December 26, 2018

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ACCELINK TECH CO LTD (CN)

H01S5/343

CN109066291A	2018-12-21
CN107230930A	2017-10-03

BEIJING TIAN QI ZHI XIN INTELLECTUAL PROPERTY AGENCY CO.,LTD (CN)

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