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Title:
SEMICONDUCTOR DEVICE COMPRISING MULTIPLY-ACCUMULATE CIRCUITRY AND STORAGE DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC EQUIPMENT
Document Type and Number:
WIPO Patent Application WO/2021/009586
Kind Code:
A1
Abstract:
Provided is a semiconductor device capable of efficiently reading weighting factors and efficiently performing multiply-accumulate operations. The semiconductor device comprises multiply-accumulate circuitry and a storage device. The multiply-accumulate circuitry is configured using transistors formed in a semiconductor substrate, and the memory cells of the storage device are configured using OS transistors that are provided so as to be layered above the semiconductor substrate. The semiconductor device comprises a plurality of multiply-accumulate units obtained by electrically connecting the multiply-accumulate circuitry to the memory cells of the storage device, wherein each multiply-accumulate unit reads weighting factors stored in memory cells, and can perform a multiply-accumulate operation.

Inventors:
AOKI TAKESHI (JP)
KUROKAWA YOSHIYUKI (JP)
KOZUMA MUNEHIRO (JP)
KANEMURA TAKURO (JP)
Application Number:
PCT/IB2020/056106
Publication Date:
January 21, 2021
Filing Date:
June 29, 2020
Export Citation:
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Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
G06N3/063; G06G7/60; G11C5/02; G11C11/405; H01L21/336; H01L21/8242; H01L27/108; H01L27/1156; H01L29/788; H01L29/792
Domestic Patent References:
WO2018189620A12018-10-18
Foreign References:
JP2019047006A2019-03-22
JP2019036280A2019-03-07
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