Title:
SEMICONDUCTOR DEVICE AND DATA PROCESSING SYSTEM
Document Type and Number:
WIPO Patent Application WO/2012/014603
Kind Code:
A1
Abstract:
Provided is a memory control technology, wherein a refresh command and a calibration command are made not to be issued consecutively. A memory control circuit (30), which issues a refresh command for requesting a refreshing operation on the basis of a preset refresh cycle, and a calibration command for requesting a calibrating operation on the basis of a preset calibration cycle, adopts a control function that inhibits a refresh command to be issued for a prescribed period of time after a calibration command is issued, and inhibits a calibration command to be issued for a prescribed period of time after a refresh command is issued.
Inventors:
SATO, Junkei (1753 Shimonumabe, Nakahara-ku, Kawasaki-sh, Kanagawa 68, 〒2118668, JP)
佐藤 純桂 (〒68 神奈川県川崎市中原区下沼部１７５３番地 ルネサスエレクトロニクス株式会社内 Kanagawa, 〒2118668, JP)
佐藤 純桂 (〒68 神奈川県川崎市中原区下沼部１７５３番地 ルネサスエレクトロニクス株式会社内 Kanagawa, 〒2118668, JP)
Application Number:
JP2011/064113
Publication Date:
February 02, 2012
Filing Date:
June 21, 2011
Export Citation:
Assignee:
Renesas Electronics Corporation (1753, Shimonumabe Nakahara-ku, Kawasaki-sh, Kanagawa 68, 〒2118668, JP)
ルネサスエレクトロニクス株式会社 (〒68 神奈川県川崎市中原区下沼部１７５３番地 Kanagawa, 〒2118668, JP)
SATO, Junkei (1753 Shimonumabe, Nakahara-ku, Kawasaki-sh, Kanagawa 68, 〒2118668, JP)
ルネサスエレクトロニクス株式会社 (〒68 神奈川県川崎市中原区下沼部１７５３番地 Kanagawa, 〒2118668, JP)
SATO, Junkei (1753 Shimonumabe, Nakahara-ku, Kawasaki-sh, Kanagawa 68, 〒2118668, JP)
International Classes:
G06F12/00; G11C11/401; G11C11/407
Attorney, Agent or Firm:
TAMAMURA, Shizuyo (Room 901, Yamashiro Building 1, Kanda Ogawamachi 1-chome, Chiyoda-k, Tokyo 52, 〒1010052, JP)
Claims: