Title:
SEMICONDUCTOR DEVICE AND DIAGNOSTIC TEST METHOD
Document Type and Number:
WIPO Patent Application WO/2016/203505
Kind Code:
A1
Abstract:
A semiconductor device (1) according to the present invention is provided with a circuit to be tested (2) that has a scan chain, and a first test control device (3) and a second test control device (4) with which a scan test is performed on the circuit to be tested using the scan chain. The second test control device (4) carries out a second scan test on the circuit to be tested (2). The circuit to be tested (2) commands the first test control device (3) to carry out a first scan test after the second scan test has been carried out. The first test control device (3) carries out the first scan test on the circuit to be tested (2) in accordance with the command from the circuit to be tested (2).
Inventors:
MAEDA YOICHI (JP)
MATSUSHIMA JUN (JP)
SUZUKI TAKAYUKI (JP)
MATSUSHIMA JUN (JP)
SUZUKI TAKAYUKI (JP)
Application Number:
PCT/JP2015/003047
Publication Date:
December 22, 2016
Filing Date:
June 18, 2015
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP (JP)
International Classes:
G01R31/28
Foreign References:
| JPH05313935A | 1993-11-26 | |||
| JPH11101859A | 1999-04-13 | |||
| JP2002189063A | 2002-07-05 |
Other References:
See also references of EP 3312623A4
Attorney, Agent or Firm:
IEIRI, Takeshi (JP)
House ON 健 (JP)
House ON 健 (JP)
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