Title:
SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS
Document Type and Number:
WIPO Patent Application WO/2019/021852
Kind Code:
A1
Abstract:
The present technology relates to a semiconductor device and an electronic apparatus, whereby generation of noise in signals can be suppressed. This semiconductor device is provided with: a first semiconductor substrate wherein at least a part of a first conductor loop is formed; and a second semiconductor substrate that includes a first conductor layer and a second conductor layer, each having a conductor, said first conductor layer and second conductor layer forming a second conductor loop. The first conductor layer and the second conductor layer are configured such that the direction of a loop plane where a magnetic flux is generated from the second conductor loop, and the direction of a loop plane where the first conductor loop generates electromotive force are different from each other. The present technology can be applied to, for instance, CMOS image sensors.
Inventors:
MIYAMOTO TAKASHI (JP)
AKIYAMA YOSHIYUKI (JP)
TSUNODA JUNICHI (JP)
KOJIMA SHUUICHI (JP)
AKIYAMA YOSHIYUKI (JP)
TSUNODA JUNICHI (JP)
KOJIMA SHUUICHI (JP)
Application Number:
PCT/JP2018/026427
Publication Date:
January 31, 2019
Filing Date:
July 13, 2018
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H04N5/357; H01L21/3205; H01L21/768; H01L21/822; H01L23/522; H01L27/04; H01L27/146; H04N5/369
Domestic Patent References:
| WO2015198913A1 | 2015-12-30 | |||
| WO2016181874A1 | 2016-11-17 | |||
| WO2016152577A1 | 2016-09-29 | |||
| WO2017149845A1 | 2017-09-08 |
Attorney, Agent or Firm:
NISHIKAWA Takashi et al. (JP)
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