Title:
SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS
Document Type and Number:
WIPO Patent Application WO/2020/095148
Kind Code:
A1
Abstract:
Provided is a semiconductor device in which data is written to a separate memory cell instead of a defective memory cell. The semiconductor device comprises a first circuit and a second circuit located on the first circuit. The first circuit corresponds to a storage unit and includes a memory cell and a redundant memory cell. The second circuit corresponds to a control unit and includes a third circuit and a fourth circuit. The memory cell is electrically connected to the third circuit, the redundant memory cell is electrically connected to the third circuit, and the third circuit is electrically connected to the fourth circuit. The fourth circuit has the function of transmitting, to the third circuit, data to be written to the memory cell or the redundant memory cell. The third circuit has the function, if the memory cell is a defective cell, of placing the memory cell and the fourth circuit in a non-conducting state, placing the redundant memory cell and the fourth circuit in a conductive state, and transmitting the data to the redundant memory cell.
Inventors:
ONUKI TATSUYA (JP)
MATSUZAKI TAKANORI (JP)
ATSUMI TOMOAKI (JP)
YAMAZAKI SHUNPEI (JP)
MATSUZAKI TAKANORI (JP)
ATSUMI TOMOAKI (JP)
YAMAZAKI SHUNPEI (JP)
Application Number:
PCT/IB2019/059245
Publication Date:
May 14, 2020
Filing Date:
October 29, 2019
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
G11C5/02; G11C29/00; H01L21/8242; H01L27/108; H01L29/786
Foreign References:
| JP2016001729A | 2016-01-07 | |||
| JPH05102430A | 1993-04-23 | |||
| JP2008181634A | 2008-08-07 | |||
| JPS56111194A | 1981-09-02 | |||
| JPS61999A | 1986-01-06 | |||
| JP2015207761A | 2015-11-19 | |||
| JP2012256837A | 2012-12-27 | |||
| JP2015228493A | 2015-12-17 |
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