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Title:
SEMICONDUCTOR DEVICE ENHANCING ELECTROSTATIC DISCHARGE PROTECTION AND LAYOUT STRUCTURE THEREOF
Document Type and Number:
WIPO Patent Application WO/2018/041080
Kind Code:
A1
Abstract:
A semiconductor device enhancing electrostatic discharge (ESD) protection and a layout structure thereof. ESD protection devices and a device (300) to be protected and having a small feature size are located on a same well area. The device (300) having the small feature size is located at a middle section. The ESD protection devices are arranged at two sides of the device (300) having the small feature size.

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Inventors:
WANG GUANGYANG (CN)
Application Number:
PCT/CN2017/099380
Publication Date:
March 08, 2018
Filing Date:
August 29, 2017
Export Citation:
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Assignee:
CSMC TECHNOLOGIES FAB2 CO LTD (CN)
International Classes:
H01L27/088; H01L23/60; H02H9/00
Foreign References:
CN102054840A2011-05-11
CN201213133Y2009-03-25
CN205319155U2016-06-15
CN101834182A2010-09-15
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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